Intel
- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Currently tracking 56 active AI roles, down 14% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 67 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (4), GenAI Software Solutions Engineer (3), AI Software Engineer Intern (2), Graduate Talent (GenAI Software Solutions Engineer) (2), Middleware Development Engineer (2). Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (51%), agents (27%), application (9%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (20 roles), China (12 roles), Mexico (9 roles), Malaysia (8 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, fine tuning.
In the past 30 days, Intel has posted 43 new AI-related roles. That is a -45% change versus the prior 30 days (78 → 43).
| Title | Stage | AI score |
|---|---|---|
| Firewall Network Security Engineer Network Security Engineer role focused on designing, architecting, and building secure classified network products for USG operations, involving firewall configuration, network hardening, and security assessments. | — | 0 |
| NMSi / WPM Module Equipment Technician Contract This role is for a Module Equipment Technician supporting semiconductor manufacturing operations. Responsibilities include maintaining, troubleshooting, and improving manufacturing equipment performance in a high-tech, cleanroom environment. The role requires performing electrical and mechanical troubleshooting, disassembling, adjusting, repairing, installing, and assembling equipment, executing setup, calibration, and preventive maintenance, and monitoring equipment performance data. It also involves documenting system failures, partnering with engineering teams for experiments and data collection, and supporting engineering troubleshooting efforts. Collaboration with module engineering and construction teams during factory ramps is also part of the job. The role requires strict adherence to safety, quality, and procedural standards. |
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| Senior CPU Design Verification Engineer Senior CPU Design Verification Engineer at Intel, responsible for pre-silicon functional verification of complex CPU and SoC logic using SystemVerilog and UVM, ensuring architectural correctness and functional robustness before first silicon. | — | 0 |
| Module Development Engineer Module Development Engineer at Intel, focusing on dry etch process innovations for high volume semiconductor manufacturing. Requires expertise in plasma physics, process integration, advanced data analytics, and DOE. The role involves technical ownership, defining long-term technical direction, and influencing cross-functional teams and suppliers to enable new device architectures and future technology roadmaps. Experience in advanced logic or foundry technologies, and a strong publication/patent record are preferred. | — | 0 |
| Analytical Chemistry Lab Technician Seeking an analytical chemist with lab experience for analysis of liquid chemical matrices, including titration, ICPOES, HPLC/IC, CVS. Responsibilities include sample preparation, analysis, data collection, and maintenance of lab equipment in support of R&D manufacturing operations. Requires a Bachelor's or Associate degree in Chemistry or related STEM field with relevant experience. | — | 0 |
| SoC Design Engineer This role is for a SoC Logic Design Engineer responsible for developing RTL code, integrating logic blocks, optimizing designs for power, performance, area, and timing, and ensuring design integrity for physical implementation. It requires experience in microarchitecture development, RTL coding, logic design, and SoC integration. | — | 0 |
| Yield and Process Control Automation Engineer This role focuses on integrating factory systems including equipment control, production activity control, MES, yield management, and SPC systems to optimize throughput, improve product quality, and enhance operational efficiency in semiconductor manufacturing. The engineer will architect, develop, and deploy automation solutions, design real-time communication interfaces using SEMI standards, and lead root-cause analysis and system-level debugging. | — | 0 |
| Senior Testchip SoC Physical Design Engineer (Integration & Methodology) This role focuses on physical design and integration methodologies for testchip vehicles in advanced semiconductor process nodes, aiming to validate new technologies and ensure manufacturing readiness. It involves developing layout design, defining critical design features with process integration teams, establishing hierarchical layout specifications, and driving physical design convergence. | — | 0 |
| Senior Photonics Design Engineer, Actives Design Senior Photonics Design Engineer specializing in active components and high-speed design for Intel's silicon photonics platform, focusing on developing next-generation optical communication solutions for data centers and AI datacenters. | — | 0 |
| Software Technician Software Technician role focused on sustaining and improving system reliability for factory floor, laboratory, and datacenter operations. Responsibilities include OS patching, upgrades, software debugging, troubleshooting, and documentation within a secure environment. Requires U.S. Citizenship and ability to obtain TS/SCI clearance. | — | 0 |
| Software Engineer Software & Infrastructure Engineer to architect, build, and maintain cloud-native applications and distributed systems for semiconductor manufacturing and testing operations. Responsibilities include full-stack development, infrastructure management (cloud/on-prem, Kubernetes), DevOps, automation, and operational support. Requires 4+ years of software development experience and US Citizenship with ability to obtain security clearance. | — | 0 |
| Materials Program Manager This role is for a Materials Program Manager at Intel, focusing on managing the supply chain for materials used in manufacturing. The responsibilities include translating market dynamics into strategies for materials planning, risk mitigation, and cost optimization, coordinating material acquisition for new product introductions and high-volume manufacturing, and collaborating with suppliers and cross-functional teams. The role requires analyzing complex data for process optimization and managing supplier relationships to ensure timely delivery and cost control. The ideal candidate will have a degree in supply chain, business, or engineering, with experience in Material Requirements Planning, risk management, and supply chain strategy. | — | 0 |
| Memory Electrical Validation Engineer Intel is seeking a Memory Electrical Validation Engineer to ensure optimized electrical performance, compliance with industry standards, and system-level reliability for memory technologies in CPU products. The role involves defining validation strategies, validating circuit analog performance, developing Memory Reference Code (MRC) requirements, designing and executing validation procedures, debugging electrical design features, and collaborating with cross-functional teams. | — | 0 |
| Materials Program Manager This role manages the materials and supply chain for new product introductions (NPI) to high volume manufacturing (HVM) at Intel. It involves coordinating material acquisition, managing supplier relationships, ensuring bill of materials integrity, and optimizing costs and risks within the supply chain. The role requires experience in business intelligence tools, data modeling, and supplier relationship management. | — | 0 |
| Intel Foundry Process TD Frame CellSet Engineer This role is for an Intel Foundry Process TD Frame CellSet Engineer responsible for integrating scribeline cells into frame layouts for semiconductor fabrication. The role involves performing layout edits, dispositioning data changes, verifying cell placement, and ensuring proper frame data output. It requires expertise in semiconductor manufacturing processes, particularly lithography and metrology, and experience with CAD layout tools. | — | 0 |
| NM Site Automation Integrator Integrates, tests, installs, configures, and/or supports Factory automation software systems. Coordinates factory requirements, maps them to automation systems capabilities and recommends technical solutions. Applies advanced troubleshooting to automation system problems. Drives continuous improvement efforts to meet automation systems' health goals, as well as emerging capability needs. Serves as site expert for a designated set of automation systems, including representing integrated needs in cross-functional and cross site teams. Position may include software development of related enhancements, supplemental systems, and/or support and monitoring tools. | — | 0 |
| Sr Test Engineer Sr Test Engineer to lead the full lifecycle of test development, test engineering, and solution deployment for a Foundry Test Organization. Assess operational, economic, and technical requirements of test solutions. Define engagement strategies, work with internal teams, and external suppliers to deliver test solutions that support the foundry business. Multidisciplinary engineer with experience spanning mechanical, thermal, and electrical domains. Advocate for customer requirements, ensuring they are understood and translated into actionable technical solutions. Synthesize complex technical challenges into clear strategies and execution plans. Provide technical leadership in a dynamic environment, drive accountability, results, and advise management on future trends, risks, and opportunities affecting the test foundry business. Evaluate and integrate test solutions across a range of scenarios including; custom, semi-custom, and industry standard test solutions. Strong communication skills required to articulate a clear vision and capability roadmap to customers, internal stakeholders, and industry partners. | — | 0 |
| Metrology Engineer This role focuses on semiconductor research and development, specifically in assembly, packaging, and platform technologies. The engineer will work on device physics, electromagnetics, thermomechanical analysis, and advanced materials to improve performance, enable miniaturization, and mass production of integrated circuits. Responsibilities include developing prototypes, establishing test methodologies, providing metrology solutions for production modules, and collaborating with various teams. The role requires a Bachelor's degree in a related field with 1+ years of experience, proficiency in semiconductor fabrication processes, and expertise in statistics and data analytics. | — | 0 |
| Sr. Director of Platform Program Management Sr. Director of Platform Program Management at Intel, responsible for managing the development timeline for Design Technology Platform (DTP) deliverables, including PDKs, Foundational IPs, Reference Flows, and Platform Validation. The role requires a semiconductor background, program management skills, and the ability to identify improvement opportunities in quality and efficiency, including AI solutions. The position involves building and leading high-performance teams and ensuring flawless execution of platform deliverables to meet release commits and customer needs. | — | 0 |
| Developer Technology Engineer This role focuses on working with game developers to optimize game titles on Intel's GPU and CPU technologies. Responsibilities include debugging, optimizing game code, shaders, APIs, and tools, collaborating with internal teams, and developing documentation. The role requires strong programming skills in HLSL and C/C++, experience with modern game engines and graphics APIs like DirectX 12, and proficiency with profiling tools. | — | 0 |
| Process Integration Development Engineer Process Integration and Yield Engineer role focused on technology transfers, optimizing manufacturing processes, and improving yield in semiconductor manufacturing. Requires strong data analysis, statistical methods, and process improvement experience. | — | 0 |
| Director-Foundry Customer Planning Director-level role leading a global supply chain organization for Intel Foundry, focusing on end-to-end demand planning, capacity management, pricing strategy, and external partner coordination to ensure predictable, high-quality product delivery. The role involves managing complex customer demands, roadmaps, and manufacturing signals to achieve on-time execution across fabs, assembly, test, and suppliers, with responsibilities including forecast accuracy, supply assurance, cycle-time optimization, and revenue protection for high-volume and advanced technology products. | — | 0 |
| Analytical Chemistry Lab Technician Analytical Chemistry Lab Technician at Intel, responsible for sample preparation, analysis using advanced techniques (ICPMS, LCMS, IC, Assay, GCMS), and laboratory equipment maintenance in support of materials analysis for semiconductor manufacturing. | — | 0 |
| Software Application Development Engineer Grade Software Application Development Engineer at Intel Foundry Automation (IFA) NPI Systems team. Develops full-stack software solutions for manufacturing automation, including new product introduction workflows, execution readiness, build logistics, and DOE planning. Responsibilities cover the full software project lifecycle, from requirements analysis to testing and support. Collaborates with technology development teams and factory engineers. | — | 0 |
| EDA Tools Software Engineer Designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation for hardware products, process design, or manufacturing. Requires in-depth knowledge of semiconductor physics, process technology, design rules, and EDA tools for EM, IR drop, and ESD. Scripting skills in languages like SKILL, Python, PERL, or TCL are essential. Experience applying AI/ML techniques for analog layout generation and geometry/graph-based problems is a plus. | — | 0 |
| GPU Design Verification Engineer This role focuses on the functional verification of graphics logic components (3D graphics, media, display) for GPUs. Responsibilities include defining and developing verification plans, test benches, and architecture, executing verification plans, running simulations, debugging issues, and collaborating with architects and developers. The role requires strong programming skills in System Verilog, OVM, and UVM, and experience in ASIC, CPU, or GPU verification. | — | 0 |
| Senior Applications and Solutions Engineer - Foundry Services Senior Applications and Solutions Engineer for Intel Foundry Services, focusing on technical support for customers using Intel's semiconductor process and packaging technologies, with a specialization in complex multi-voltage domain ASIC design implementation and verification. The role involves customer guidance, quality improvements in design kits, and performing ASIC design services. | — | 0 |
| Formal Verification Engineer - CPU Core Seeking a Formal Verification Engineer to join the US CPU verification team, focusing on the development of next-generation CPUs for AI applications. Responsibilities include writing verification test plans, developing pre-silicon verification collateral, technical ownership of formal verification for microarchitecture blocks, ROI analysis, and debugging. | — | 0 |
| Senior CPU Core Physical Design Engineer This role is for a Senior CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, clock tree synthesis, static timing analysis, and power/clock distribution. The engineer will also conduct verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role is critical to the development of next-generation CPUs designed to power the AI revolution. | — | 0 |
| CPU Core Physical Design Engineer This role is for a CPU Physical Design Engineer responsible for the physical design implementation of custom CPU designs from RTL to GDS, including synthesis, place and route, static timing analysis, and power/clock distribution. The engineer will also perform verification and signoff, analyze results to improve microarchitectures, and work with EDA vendors to enhance tool capabilities. The role requires expertise in VLSI circuit design, static timing analysis, and low power design, with a focus on developing CPUs for the AI revolution. | — | 0 |
| Module Development Engineer Module Development Engineer at Intel focused on advancing semiconductor manufacturing technologies through process and device architecture development, collaborating with suppliers, and optimizing production efficiency. | — | 0 |
| GPU Design Verification Engineer This role is for a GPU Design Verification Engineer at Intel. The engineer will be responsible for defining, developing, and performing functional validation for GPUs, ensuring interaction with media, display, and system-level features. They will apply hardware and software tools to meet performance, power, and area goals, review design changes, develop validation methodologies, and perform silicon debug. The role also involves developing post-silicon validation infrastructure and collaborating with various teams to improve debug and validation strategies. A Bachelor's degree in electrical/computer engineering with 7 years of experience or a Master's with 5 years is required, with experience in SystemVerilog, OVM/UVM, scoreboards, test plans, and CPU/GPU architecture. | — | 0 |
| CPU Verification Engineer CPU Design Verification Engineer responsible for verifying and validating high-performance, power-efficient processors. Develops and executes verification plans, creates UVM-based testbenches, performs functional coverage analysis, and debugs pre-silicon environments. Collaborates with architects and designers, and enhances verification infrastructure. | — | 0 |
| Packaging Module Development Engineer Develops and optimizes semiconductor packaging technologies, focusing on First Level Interconnect (FLI) and collaborating with cross-functional teams to improve assembly processes, scale advanced capabilities, and lead equipment development. Requires a Master's or PhD in a relevant engineering field with experience in programming/scripting (Python, MATLAB) with AI/ML concepts. | — | 0 |
| TD Media and Collaterals Development Engineer Develops and optimizes media and collaterals for Intel's assembly packaging platform technologies, applying statistical principles and experimental design to improve manufacturing efficiency, quality, and reliability. This role involves developing evaluation equipment, new techniques for problem identification, and consulting on design and process improvements. | — | 0 |
| Infrastructure Engineer – Compute and Client Infrastructure Engineer focused on server hardware management, lifecycle, and operating systems (Linux/Windows) in a data center environment. Responsibilities include deployment, configuration, troubleshooting, firmware/driver maintenance, OS patching, performance monitoring, and documentation. Requires strong analytical and troubleshooting skills, proactive issue resolution, and excellent documentation. | — | 0 |
| Design Technology Tool Enablement Engineer The Design Technology Platform team is looking for an EDA Tools Software Engineer to design, develop, test, and debug software tools and flows for process design and manufacturing. This role involves collaborating with process developers and EDA vendors, automating workflows, and ensuring seamless integration with design methodologies. The position requires expertise in scripting languages, EDA tools, and semiconductor device physics. | — | 0 |
| Senior Clock Architecture & Design Engineer Senior Clock Architecture & Design Engineer role focused on developing clocking architecture for next-generation CPUs, involving the design of clock distribution networks, custom circuits, and optimization of clock tree synthesis flows. Requires experience in physical design, CTS, static timing analysis, and custom circuits. | — | 0 |
| Senior Yield Engineer – Substrate & Advanced Packaging Senior Yield Engineer at Intel focusing on semiconductor manufacturing, specifically substrate and advanced packaging. The role involves leading process development, performing advanced statistical analysis and data visualization, developing methods to analyze big data for yield modeling and defect understanding, and collaborating cross-functionally to resolve yield issues. It requires expertise in engineering analysis tools, data analysis techniques, scripting languages (Python), manufacturing process flows, and large-scale data analytics (JMP, SQL, Python). | — | 0 |
| Principal Analog Circuit Design Engineer - SerDes Seeking a Principal Analog Design Engineer to lead the design and validation of high-speed analog circuits for SerDes applications. Requires expertise in analog/mixed-signal design, high-speed communication standards, and silicon bring-up. Will mentor junior engineers and collaborate with cross-functional teams. | — | 0 |
| Software Application Development Engineer Software Application Development Engineer for Intel's Foundry Automation team, focusing on developing and implementing solutions for automated factories. The role involves partnering with end-users, gathering requirements, analyzing processes, managing projects, and providing L3 support in a 24/7 manufacturing environment. Requires PL/SQL and RDBMS schema design experience, with a strong emphasis on collaboration and technical problem-solving within manufacturing systems. | — | 0 |
| Qubit Control IC Designer Design and test complex mixed-signal system-on-chip (SoC) and FPGA solutions for quantum computer control electronics, interfacing with qubits and generating control signals. Requires expertise in RF/analog/mixed-signal circuit design, silicon prototyping, and signal integrity analysis. | — | 0 |
| RTL Design Engineer Develops logic design, RTL coding, and simulation for CPU cell libraries, functional units, and IP blocks. Participates in architecture and microarchitecture definition, optimizes logic for power, performance, area, and timing, and reviews verification plans. Documents microarchitectural specs and supports SoC customers. | — | 0 |
| GPU Logic Design Engineer Develops and optimizes RTL code for GPU IPs, ensuring alignment with architecture and microarchitecture specifications. Performs power, performance, area, and timing optimization, and executes unit-level verification. Collaborates with SoC customers for seamless integration. | — | 0 |
| Packaging Module Development Engineer Develops and optimizes semiconductor packaging technologies, focusing on interconnects and thermal solutions. Collaborates on equipment, materials, and processes for high-volume manufacturing, requiring a PhD or Master's in a related engineering/science field and experience in mechanical design or manufacturing systems. | — | 0 |
| APTM Advanced Packaging Dry Etch Development Manager Lead a team of process engineers in developing and implementing dry etch processes for next-generation advanced packaging solutions at Intel Foundry. This role involves managing engineers, formulating long-term strategies, overseeing production-worthy etch processes, and driving yield improvement initiatives. | — | 0 |
| WPM- C4 Production Line Coordinator Technician Contract (Swing Shift) This role is a Production Line Coordinator Technician in a wafer fab at Intel. The primary responsibilities involve identifying and eliminating barriers to tactical execution, managing line limiters, optimizing line management, WIP management, and Critical Queue Time (CQT). The role requires understanding production systems, analyzing lot flow and tool performance data, and collaborating with module teams. It is a contract position with a swing shift schedule. | — | 0 |
| Fab Equipment Maintenance Commodity Manager Commodity Manager responsible for developing and managing supply chain solutions for fab equipment spares and service. This role involves developing and executing commodity strategies, negotiating contracts, managing supplier relationships, and identifying cost-saving opportunities within Intel's global supply chain. | — | 0 |
| Senior CPU Physical Design Engineer Senior CPU Physical Design Engineer at Intel, responsible for the physical design and verification of E-Core/Atom microprocessors. This role involves qualifying PDKs, standard cell libraries, and managing the RTL2GDS flow, including synthesis, floor planning, place and route, static timing analysis, power analysis, and reliability checks. The engineer will also collaborate with cross-functional teams and EDA vendors to enhance design methodologies and automate processes. | — | 0 |
| SOC Physical Design Static Timing Analysis Engineer This role focuses on Static Timing Analysis (STA) for System-on-Chip (SoC) physical design at Intel. The engineer will perform timing analysis, generate and verify timing constraints, address timing violations, conduct timing rollups, and develop optimized clock networks. They will also define methodologies for timing models, establish PVT conditions, and collaborate with various teams (clocking, architecture, DFT, logic design) to ensure designs meet performance and power efficiency requirements. The role involves contributing to tools, flows, and methodologies for physical design and timing processes. | — | 0 |