Intel
- HQ
- Santa Clara, US
- Founded
- 1968
- Size
- 120,000+
- Website
- intel.com
Intel currently has 84 active job listings related to artificial intelligence. The majority of these roles, 51%, are focused on serving infrastructure, with agents representing another significant portion at 24%. Engineering is the most frequent function for these positions. The company is actively hiring in the United States, China, and Mexico. Frequent technical tags include model serving, inference infrastructure, and agent orchestration. In the last 30 days, Intel has added 73 new AI roles, representing a 52% increase compared to the previous 30-day period.
Currently tracking 56 active AI roles, down 14% versus the prior 4 weeks. Primary focus: Serve · Engineering. Salary range $122k–$414k (avg $253k).
Intel currently has 67 active AI-related roles in our index. The most common open titles are: AI Software Engineering Intern (4), GenAI Software Solutions Engineer (3), AI Software Engineer Intern (2), Graduate Talent (GenAI Software Solutions Engineer) (2), Middleware Development Engineer (2). Most positions are in Engineering and Research.
Intel's active AI hiring is concentrated in: serving infrastructure (51%), agents (27%), application (9%). These categories follow a seven-stage AI lifecycle: data, pre-training, post-training, serving infrastructure, agents, evaluation, and application.
Intel is hiring AI talent in: United States (20 roles), China (12 roles), Mexico (9 roles), Malaysia (8 roles).
Job postings at Intel most frequently reference: model serving, inference infra, agent orchestration, rag, fine tuning.
In the past 30 days, Intel has posted 43 new AI-related roles. That is a -45% change versus the prior 30 days (78 → 43).
| Title | Stage | AI score |
|---|---|---|
| Wet Etch Cleans Technical Manager Technical Manager for Wet Etch Cleans in Intel's Logic Technology Development, focusing on advanced logic nodes and High Volume Manufacturing. This role involves hands-on process development, R&D to HVM deployment, and technical leadership. | — | 0 |
| Post-silicon Validation and Debug Engineer This role focuses on post-silicon validation and debug engineering for Intel's System-on-Chip (SoC) products, ensuring seamless performance by working at the intersection of hardware, firmware, and software. Responsibilities include performing low-level debug, developing validation plans, conducting root cause analysis, and collaborating with cross-functional teams to deliver high-quality products. | — | 0 |
| RF Engineer Designs, develops, and verifies complex radio frequency integrated circuits and creates verification test plans for RF validation. This role involves transistor level feasibility analysis, floorplan and layout definition, test bench creation, and debugging designs to meet specifications. It requires an understanding of electromagnetic theory, communication theory, RF test equipment, RF circuit design, RF system analysis, and RF measurements. The role also involves reviewing system specifications and design plans for compliance. |
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| Facilities Power Distribution Electrical Engineer Electrical Engineer responsible for the operation, maintenance, and upgrades of Intel's site electrical power distribution systems, including troubleshooting, studies (breaker coordination, arc flash), load tracking, and partnering with utilities and project teams. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in medium voltage systems. | — | 0 |
| Senior Infrastructure and DevOps Engineer This role focuses on designing, deploying, and maintaining Linux-based infrastructure for large-scale modeling, simulation, and data analysis workflows within Intel's Silicon Architecture group. The engineer will manage CI/CD pipelines, automation, artifact storage, and monitor/improve pipeline performance and observability, working cross-functionally to enhance developer productivity and system scalability. | — | 0 |
| GPU Design Verification Engineer Intel is seeking a GPU Design Verification Engineer to ensure the functional accuracy and performance of their GPU architectures. The role involves developing verification plans, test benches, and executing simulations to validate designs, debug issues, and collaborate with cross-functional teams. The position requires experience in System Verilog, UVM, and scripting languages, with a focus on graphics IP verification for integrated, discrete, and AI-enabled platforms. | — | 0 |
| GPU Design Verification Engineer This role is for a seasoned professional GPU Design Verification Engineer to join an IP team. Responsibilities include planning, designing complex structures, leading design and verification efforts, defining strategy, and architecting testbenches. The role requires expertise in Verilog, System Verilog, UVM, assertion-based verification, and industry standard protocols. Experience with AI tools or advanced process nodes is preferred. | — | 0 |
| SOC Performance Architect Intel is seeking a SOC Performance Architect to design and evaluate complex hardware features and structures for the XEON CPU and AI portfolio. Responsibilities include defining, documenting, and testing processes, and identifying/resolving design weaknesses to influence future product architecture. The role requires experience in computer architecture, software engineering, performance analysis, SoC-level development, and proficiency in programming and scripting languages. | — | 0 |
| Senior PCB/CAD Layout Engineer Senior PCB/CAD Layout Engineer to lead the design and delivery of cutting-edge printed circuit board layouts across diverse electrical systems, including both flexible and rigid circuit boards. This role combines technical excellence with strategic impact, directly contributing to Intel's key objectives through innovative PCB design solutions. | — | 0 |
| Linux Kernel Engineer This role involves designing, developing, and maintaining Linux kernel features, subsystems, and device drivers. The engineer will optimize kernel performance, debug kernel issues, and contribute to the upstream Linux kernel project. The position requires experience with system software, OS internals, and open-source contributions, with a focus on Intel hardware platforms. | — | 0 |
| Intel Contract - Facilities Water/Waste Treatment Technician This role is for a Facilities Water/Waste Treatment Technician at Intel, responsible for maintaining and improving water systems, conducting sampling and analysis, operating and troubleshooting equipment, and preparing technical reports. It involves collaboration with multidisciplinary teams and adherence to sustainability standards. | — | 0 |
| Senior Physical Design Integration Engineer This role focuses on the physical design integration of custom CPU designs, from RTL to GDS, for manufacturing. It involves synthesis, place and route, timing analysis, and verification, with a focus on optimizing CPU designs for power, frequency, and area. The role collaborates with various teams and EDA vendors to improve design methodologies and flow automation, contributing to AI-accelerated systems. | — | 0 |
| Atom CPU Architecture Engineer This role focuses on CPU architecture and microarchitecture engineering at Intel, involving the design, development, and optimization of CPU logic for performance, power, and area. Responsibilities include defining specifications, evaluating trade-offs, modeling performance, and collaborating with cross-functional teams. The role requires a degree in a relevant engineering field and experience with CPU simulators and C++. | — | 0 |
| GPU Validation Engineer This role is for a GPU Design Verification Engineer at Intel, focusing on ensuring the quality of advanced graphics solutions, including those for AI-based graphics products. The engineer will perform functional verification, develop test benches, debug issues, and collaborate with cross-functional teams to meet functional, performance, and power goals. The role requires a Bachelor's or Master's degree with significant experience in silicon design development, validation methodologies, and simulation/emulation debugging, along with proficiency in C/C++/Python and SystemVerilog. | — | 0 |
| Software Development Engineer Software Development Engineer role focused on designing, developing, and testing cloud-native applications and microservices with a strong emphasis on security best practices and automated testing within a government programs context. Requires experience with Azure cloud solutions, APIs, and container technologies. | — | 0 |
| GPU Software Development Engineer GPU Software Development Engineer focused on validation and debug of graphics IP, integrating features, triaging failures, and developing debug tools. The role involves scaling across display, media, 3D, compute, and power conservation components, and enabling features for AI domains to improve performance on graphics products. Requires strong analytical and problem-solving skills, with experience in C, C++, Python, and graphics/GPU hardware/software. | — | 0 |
| Network Systems and Solutions Engineer This role focuses on providing technical support and engineering solutions for Intel's programmable Infrastructure Processing Units (IPUs) to customers, involving hardware and software integration, system bring-up, driver configuration, and use case testing. The engineer will also develop technical collateral, evaluate tools, and analyze customer feedback to drive product improvements. | — | 0 |
| APTM NPI Integration Seeking an NPI Integration Engineer to manage the development and execution of new product introductions and process transfers across factories, ensuring technology and products meet certification requirements before transferring to High Volume Manufacturing (HVM). Responsibilities include logistical coordination, acting as a primary information interface, tracking collateral, managing silicon progress, and developing new NPI systems and business processes. | — | 0 |
| Systems and Solutions Engineer This role focuses on product lifecycle management, workflow definition, requirements analysis, solution design, and program planning within the context of processor platforms. It involves cross-functional collaboration and continuous improvement of engineering processes. | — | 0 |
| Director, Data Center Strategy and Capacity Planning This role defines and drives the multi-year infrastructure strategy and capacity plan for global IT data center environments, balancing performance, scalability, cost, and resiliency. It involves creating demand forecasts, scenario planning, identifying capacity risks, developing investment frameworks (CapEx, OpEx, TCO), and influencing enterprise-level trade-offs. The position also manages infrastructure refresh strategies, governs data for demand and capacity, and translates complex information into executive-ready narratives. | — | 0 |
| Sr. Facilities Engineer Sr. Facilities Engineer at Intel, focusing on critical environments like data centers and laboratories. Responsibilities include providing technical leadership for mechanical systems (HVAC, cooling plants), ensuring reliability and safety, coordinating shutdowns, performing reliability engineering and analytics, and overseeing design, commissioning, and vendor governance. Requires a Bachelor's degree in Mechanical/Electrical Engineering or equivalent, with 10+ years of experience in critical environments and mechanical/electrical systems. | — | 0 |
| Foundry Customer Device Engineer Seeking a Customer Device Engineer to join Intel's Foundry organization, focusing on bridging advanced manufacturing capabilities with customer needs. Responsibilities include coordinating cross-functional teams, managing change processes, collaborating with technology development, guiding customers, and developing innovative solutions to drive customer success in semiconductor manufacturing. | — | 0 |
| CPU Formal Verification Engineer This role focuses on the formal verification of CPU microarchitectures using formal verification tools and methodologies. The engineer will develop and implement verification plans, create abstraction models, develop formal proofs, and collaborate with design teams to ensure the quality and reliability of Intel's CPU technologies, which are used in various devices including AI and machine learning systems. | — | 0 |
| CPU Verification Engineer Seeking a CPU verification engineer to ensure the functional correctness of CPU logic designs through pre-silicon verification methodologies. Responsibilities include developing verification plans, building UVM testbenches, running simulations, debugging issues, and collaborating with design and architecture teams. | — | 0 |
| Foundry Services Advanced Packaging Account Technical Solutions Engineer This role is for an experienced Technical Solutions Engineer focused on semiconductor packaging and test within Intel Foundry Services. The engineer will manage customer relationships, provide technical consultation on packaging solutions, and collaborate with internal teams to influence product roadmaps. Responsibilities include developing Statements of Work, managing the customer engagement lifecycle, and acting as the Voice of the Customer within Intel. | — | 0 |
| Foveros Direct Pathfinding Integration This role focuses on designing, developing, and qualifying packaging solutions and materials for semiconductor products, applying scientific and engineering principles. Responsibilities include managing the packaging development process from artwork to manufacturing startup, and consulting on product launch requirements. The role requires a Bachelor's degree with 6+ years of experience or a Master's with 4+ years, or a PhD with 4+ years, in a relevant engineering or science field, with expertise in packaging engineering, process development, and thermal, mechanical, and electrical design concepts. | — | 0 |
| Foundry Customer Yield Engineer This role focuses on yield optimization in semiconductor manufacturing through data analysis and predictive modeling, collaborating with internal teams and external foundry customers. It requires strong analytical and problem-solving skills within the semiconductor industry. | — | 0 |
| Semiconductor Device Modeling Engineer Seeking a Semiconductor Device Modeling Engineer to support compact modeling activities for Intel's new technologies. Responsibilities include supporting compact modeling, developing methodologies for device targeting, and potentially applying machine learning algorithms to data analysis and model development. | — | 0 |
| Semiconductor Device Modeling Engineer Intel is seeking a Semiconductor Device Modeling Engineer to support compact modeling activities for new technologies. The role involves hands-on experience with transistor modeling, extraction tools, simulators, IV/CV fitting, and Python scripting. Experience with machine learning algorithms for data analysis and model development is a plus. | — | 0 |
| Automation AMHS Equipment Engineer This role is for an Automation AMHS Equipment Engineer at Intel, focusing on the design, development, testing, and debugging of software for wafer and reticle storage and transportation systems within a factory environment. The role involves working with firmware, drivers, operating systems, and collaborating with IT services to optimize factory performance and integrate new product introductions. While the company mentions AI and the AI era, the core responsibilities of this specific role are in industrial automation and equipment engineering, not direct AI/ML model development or deployment. | — | 0 |
| Firmware HW Integration Validation Lead This role focuses on leading the integration and validation of firmware for IPs and custom modules into SOCs, developing embedded software and firmware for cutting-edge technologies in environments with constrained timing and memory resources. It involves developing and executing validation test plans, collaborating across disciplines, and mentoring junior team members. | — | 0 |
| Physical Design Engineer - Neuromorphic Computing Intel is seeking a Physical Design Engineer to work on their Neuromorphic Computing Lab, focusing on designing novel computing paradigms for physical AI systems. The role involves ensuring designs meet performance, area, power, and scan coverage targets, working with RTL designers, and running synthesis and place-and-route trials. | — | 0 |
| Foundry Customer NPI Integration Engineer This role is for a Foundry Customer NPI Integration Engineer at Intel, focusing on managing the New Product Introduction (NPI) process for foundry customers. The engineer will ensure timely and high-quality delivery of silicon, optimize processes, manage schedules, assess risks, and collaborate with internal and external teams to resolve issues and improve yield. A critical responsibility is to identify recurring patterns, abstract learnings into foundry standards, and automate/proliferate best practices across technologies and customers. The role requires strong project management and problem-solving skills within the semiconductor manufacturing industry. | — | 0 |
| Foundry Customer Integration Engineer Customer Integration Engineer role at Intel Foundry, focusing on integrating semiconductor technologies for foundry customers. Responsibilities include identifying patterns from customer engagements, abstracting them into foundry standards, supporting customer improvement projects, responding to process issues, and collaborating with internal teams to ensure seamless technology integration and customer satisfaction. Requires strong problem-solving, communication, and project management skills within the advanced node semiconductor industry. | — | 0 |
| Quality Manager Quality Manager for Intel Foundry Construction and Sourcing (FCS) responsible for the site construction quality assurance program and project quality systems for semiconductor manufacturing factories. This role involves developing and implementing Quality Management Plans, overseeing third-party inspection firms, reviewing contractor quality plans, and ensuring work conforms to specifications. The position requires strong project management, communication, and negotiation skills, with a focus on building relationships and mitigating issues proactively. | — | 0 |
| Senior Director, AI SOC Design Verification Directs and manages a team of design verification engineers responsible for Subsystem and SoC design verification, focusing on AI GPU and AI-accelerated systems. Requires expertise in SystemVerilog, UVM, and industry-standard protocols, with experience in hardware emulation platforms preferred. | — | 0 |
| Senior Product Manager - Server CPU This role is for a Senior Product Manager responsible for Intel Xeon server CPUs, focusing on product definition, roadmap planning, launch, and lifecycle management. The role requires owning the product end-to-end, translating ambiguous inputs into clear decisions, defining workload-based success metrics, and aligning cross-functional teams. Experience with server/datacenter platforms, competitive positioning, and workload-based performance frameworks is preferred. | — | 0 |
| Sr. EDA Tools Engineer - ESD This role focuses on developing and maintaining Electronic Static Discharge (ESD) and Electrical Overstress (EOS) rule decks for Intel's advanced process technologies. The engineer will collaborate with design, reliability, and CAD teams, define QA requirements, and lead innovation in verification automation. The position requires a Master's or PhD in Electrical Engineering or Computer Engineering with experience in physical design verification, ESD PERC rule decks, and scripting. | — | 0 |
| Compiler Engineer Compiler Engineer role at Intel focused on developing and maintaining an LLVM-based compiler stack (C, C++, SYCL, Fortran) for Intel's processor platforms, impacting AI, HPC, and other domains. Responsibilities include designing features, collaborating with hardware teams, contributing to open-source communities, and ensuring performance. | — | 0 |
| Senior Data Scientist (Quality Systems) The role focuses on quality engineering within Intel Foundry's advanced package substrate roadmap. It involves leading the application of advanced statistical methods like SPC, conducting operational audits, introducing and enforcing quality standards, and driving continuous improvement initiatives. The goal is to elevate quality standards internally and at suppliers to meet customer expectations in a competitive foundry environment. | — | 0 |
| Senior CPU Power Management Architect This role focuses on CPU power management architecture, including defining microarchitecture specifications, exploring new power management solutions, and collaborating with hardware and software teams. It involves defining mechanisms for DVFS, power states, thermal control, and using machine learning algorithms for power and performance optimization. The role also includes post-silicon debug and tuning. | — | 0 |
| Principal Engineer, Design Technology Co-optimization This role focuses on the design and optimization of standard cell libraries for Intel's leading-edge process nodes, working with foundry customers and EDA partners to improve cell performance, power, and area. It involves deep technical understanding of semiconductor technology, foundation IP design, and library cell characterization. | — | 0 |
| Software Application Development Engineer Software Applications Development Engineer to create full stack integrated software solutions for new product introduction workflows management, execution readiness and controls, build readiness and logistics capabilities, and Design of Experiments (DOE) planning applications. The role involves the complete software project lifecycle, working with stakeholders from Assembly Test Technology Development (ATTD) and Logic Technology Dev (LTD) Fabs. | — | 0 |
| Substrate Supplier Enablement Engineer This role focuses on enabling new manufacturing capacity for advanced packaging suppliers by leading substrate supplier development and qualification activities. The engineer will drive technical enablement, manage readiness milestones, and collaborate with cross-functional teams and suppliers on various substrate technologies and processes. | — | 0 |
| CPU Performance Architect This role focuses on CPU performance architecture, developing and optimizing CPU logic for power, performance, and area. Responsibilities include defining CPU architecture specifications, modeling performance and power, analyzing bottlenecks, developing tests, and collaborating with engineering teams. Requires a degree in a related field and experience with C++. | — | 0 |
| Senior Middleware Development Engineer Senior Middleware Development Engineer to join a communication runtimes team, developing and optimizing libraries like Intel SHMEM, Intel MPI, MPICH, and Intel oneCCL. The role involves working with the latest Intel GPUs and CPUs, collaborating with scientists and engineers on supercomputers, and improving scientific computing and machine learning. Requires understanding of communication stacks, strong analytical skills, and excellent communication. | — | 0 |
| GPU IP Engineering Program Manager This role is for a GPU IP Engineering Program Manager at Intel, responsible for supporting the General Manager and staff in the development, integration, and execution of GPU IP. The position involves understanding the state of IP development, managing staff operations, driving cross-team projects, and ensuring effective operating rhythms. It requires strong technical fluency in Intel's technologies and engineering processes, as well as excellent program management and communication skills. | — | 0 |
| Package Design Rule Owner (DRO) Seeking an experienced Package Design Rule Owner (DRO) to define, validate, and deploy design rules for package substrate design, collaborating with product design, manufacturing, and assembly teams to ensure competitive product designs that meet cost and manufacturability requirements. The role involves working from early technology stages through product design tape out, driving a consistent Design Rule strategy and a forward-looking roadmap, and interacting with cross-disciplinary stakeholders, external suppliers, and customers. | — | 0 |
| Senior CPU Pre-Silicon Verification Engineer Senior CPU Pre-Silicon Verification Engineer role focused on leading and executing functional verification of CPU logic using UVM and System Verilog. Responsibilities include developing test benches, analyzing power and timing, debugging issues, and collaborating with cross-functional teams. The role requires experience in digital logic design and scripting languages, with preferred experience in AI agents in verification. | — | 0 |
| CPU Formal Verification Engineer This role focuses on the formal verification of CPU designs, ensuring the quality and reliability of Intel's cutting-edge CPU technologies. The engineer will develop strategies, create abstraction models, collaborate with design teams, and debug issues. While the role mentions AI and machine learning systems as applications of the CPUs, the core function is CPU verification, not AI/ML model development. | — | 0 |