Ip Logic Design Engineer

Intel Intel · Semiconductors · Bangalore, India

This role is for an IP Logic Design Engineer at Intel, focusing on designing and optimizing Intellectual Property (IP) blocks for next-generation Custom System-on-Chip (SoC) designs. Responsibilities include RTL coding, simulation, architecture definition, logic optimization for power/performance/area/timing, debugging, and front-end quality checks. The role requires expertise in digital design, RTL coding, System Verilog, low-power design methodologies, and protocols like PCIe and AXI.

What you'd actually do

  1. Develop and implement Register Transfer Level (RTL) coding and simulations for IP blocks, ensuring seamless integration into SoC designs.
  2. Collaborate on defining architecture and microarchitecture features for IP blocks, aligning them with system requirements.
  3. Optimize logic designs to meet power, performance, area, and timing objectives while ensuring design integrity for physical implementation.
  4. Debug RTL designs and resolve test failures to ensure correctness and high-quality delivery of features.
  5. Perform front-end quality checks, including CDC, RDC, LINT, synthesis, and timing closure.

Skills

Required

  • digital design
  • RTL coding
  • System Verilog
  • low-power design methodologies
  • front-end tools (CDC, RDC, LINT, synthesis, timing closure)
  • protocols (PCIe, AXI, AHB, APB)
  • UPF low-power coding
  • clock gating
  • clock domain crossing
  • power gating techniques
  • debugging RTL designs
  • writing verification testbenches
  • scripting languages (TCL)

Nice to have

  • collaboration across functional teams
  • solving complex design challenges
  • communication skills
  • articulating technical concepts