Ip Rtl Design Engineer

Intel Intel · Semiconductors · Bangalore, India

RTL Design Engineer for Intel Unified Chassis, focusing on protocol bridges and IP components. Responsibilities include design, implementation, verification, and collaboration with architects and senior engineers. Requires expertise in RTL coding, digital design principles, and hardware description languages like Verilog or VHDL.

What you'd actually do

  1. Design, implement, and verify protocol bridges between different bus and interconnect standards (e.g., AXI, AXI-Lite, APB, IOSF-SB, HBW, LBW).
  2. Contribute to the development and support of other IP components as needed for Intel Chassis projects.
  3. Collaborate with architects and senior engineers to define microarchitecture and interface requirements for protocol bridges and other IP blocks.
  4. Develop RTL code and simulations for protocol bridge logic and other IP, ensuring functional correctness and performance targets.
  5. Implement access control, privilege qualification, and policy propagation for secure data paths.

Skills

Required

  • RTL coding
  • logic design
  • simulation
  • Verilog
  • VHDL
  • digital design principles
  • power, performance, and area optimization
  • synthesis tools
  • timing analysis tools
  • formal verification tools
  • RTL debugging
  • RAS/debug/security/telemetry expertise

Nice to have

  • Master's or PhD in Electrical Engineering, Computer Engineering, or related field
  • cross-functional team collaboration
  • SoC customer support
  • IP integration and verification
  • industry trends in logic design and chip development
  • project leadership
  • innovative solutions
  • NOC in IP Design
  • Credit-Based Fabric & Bridge Architectures
  • High-Throughput SoC Interconnect Design
  • Fabric / Protocol IP
  • Scalable Interconnect

What the JD emphasized

  • Minimum 6-15 years of experience in RTL coding, logic design, and simulation.