Server Performance Architect

AMD AMD · Semiconductors · Austin, TX · Engineering

AMD is seeking a Server Performance Architect to optimize performance of new features for AMD-based next-generation servers. The role involves architecting, validating, and optimizing performance through full chip simulation and emulation platforms. Key responsibilities include performance analysis, correlation, and developing AI/ML-based infrastructure for automation and efficiency improvements. The role requires a strong understanding of CPU microarchitecture, performance metrics, and experience with simulation/emulation tools, with a plus for ML/AI techniques in performance triage.

What you'd actually do

  1. Develop and execute performance verification plans targeting IPC, latency, throughput, and power efficiency.
  2. Analyze performance bottlenecks using simulation, emulation, and silicon data.
  3. Drive the development of AI/ML-based infrastructure to automate performance analysis, anomaly detection, and efficiency improvements.
  4. Build and maintain scalable, modular performance verification infrastructure.
  5. Provide emulation-based performance setup and debug, enabling early performance validation.

Skills

Required

  • performance modeling
  • simulation tools
  • CPU microarchitecture
  • performance analysis
  • system-level performance verification
  • x86 ISA
  • performance metrics
  • performance analysis tools
  • correlation techniques
  • workload optimization
  • analytical and problem-solving skills
  • data-driven mindset
  • Emulation based functional and performance verification
  • RTL coding
  • SOC bring-up debug
  • systems architecture
  • CPU
  • memory
  • storage
  • I/O subsystems
  • hardware performance counter monitoring tools
  • performance profiling tools
  • x86 based (e.g. linux perf, Windows perfmon)
  • MS/PhD in Computer Engineering / relevant coursework / thesis
  • communication skills (verbal, written, and presentation)
  • > 4 years relevant industry experience

Nice to have

  • performance modeling and simulation tools (e.g., cycle-accurate simulators, emulators)
  • PMC DV
  • latency and throughput validation
  • emulation platforms
  • performance debug flows
  • modern out-of-order CPU cores
  • memory subsystems
  • performance modeling
  • performance benchmarks like SPEC CPU
  • ML/AI techniques/frameworks for performance triage, infrastructure automation and prediction
  • high-performance computing (HPC)
  • virtualization
  • server-class CPUs
  • hardware/software co-design
  • performance-aware compiler optimizations
  • pre-silicon and post-silicon debug methodologies

What the JD emphasized

  • AI/ML-based infrastructure to automate performance analysis
  • Leverage data-driven techniques to optimize verification coverage