3d Physical Design Engineer

Cerebras · Semiconductors · Headquarters +1 · Silicon

The role is for a 3D Physical Design Engineer focused on designing and analyzing 3D integrated AI chips. Responsibilities include traditional ASIC/SoC physical design, packaging, power, clock, and cooling analysis, working with architecture and RTL teams on novel 3D integration concepts. Requires extensive experience in physical design, verification, and 3D physical design specifics.

What you'd actually do

  1. working on the design and analysis of 3D integrated products
  2. combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis
  3. work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration
  4. Strong knowledge of block level and full-chip physical verification methodology
  5. Expert at optimizing for the best power/performance and area

Skills

Required

  • 10+ years of physical design/verification experience
  • Strong knowledge of block level and full-chip physical verification methodology
  • Expert at optimizing for the best power/performance and area
  • Experience with the complete physical design flow
  • Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues
  • Expert with IR/EM analysis and resolution
  • Strong ability in scripting languages like Tcl and Python
  • Ability to make flow enhancements
  • Demonstrated ability to work with RTL teams to optimize for physical design
  • Knowledge of 2.5D or 3D packaging solutions
  • Must have experience with 3d physical design, 3d die stacking, 3d chip design, die-to-die or wafer-to-wafer

Nice to have

  • Knowledge of Synopsys tool suite is a plus
  • Experience doing full chip floor planning and integration
  • Knowledge of clock distribution
  • Knowledge of cooling analysis

What the JD emphasized

  • Must have experience with 3d physical design, 3d die stacking, 3d chip design, die-to-die or wafer-to-wafer