Adce Packaging Design Architect

Intel Intel · Semiconductors · Arizona, Phoenix, United States +1

Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design. Completes documentation and collateral into the product lifecycle management system of record.

What you'd actually do

  1. Drives end-to-end development for substrate design from concept through tape out and implements physical layout and routing of the package design.
  2. Performs substrate fit and routing studies to establish design, performance, and cost tradeoffs.
  3. Works closely with silicon and hardware teams to optimize silicon-package-board performance and pinout.
  4. Defines substrate design rules, conducts internal and external reviews, analyzes data, and resolves DRCs to optimize package design.
  5. Completes documentation and collateral into the product lifecycle management system of record.

Skills

Required

  • Ph.D./master’s in electrical engineering/ chemical engineering/ mechanical engineering or Material Science
  • 10+ years and in-depth knowledge/background in Package, PCB design, or IC digital design
  • design and electrical analysis
  • semiconductor fabrication and packaging
  • analytical ability and problem-solving skills
  • design and electromagnetic simulation tools: Mentor, Cadence tools, SPICE, Ansys tools etc.
  • Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP, Concept HDL, Sigrity), and/or Mentor Xpedition platform tools (PCB Layout/XPD, Designer, Hyperlynx)

Nice to have

  • assembly process, test and characterization techniques

What the JD emphasized

  • strong technical background in design and electrical analysis
  • Solid background in semiconductor fabrication and packaging
  • Strong analytical ability and problem-solving skills
  • Experience with design and electromagnetic simulation tools
  • Experience in Cadence Allegro platform tools
  • Experience and knowledge with assembly process, test and characterization techniques