Advanced Technology: R&d Engineer - Ai/ml, Hpc

Cerebras Cerebras · Semiconductors · Headquarters +1 · Software

This role focuses on designing and implementing AI/ML workloads on Cerebras' unique wafer-scale hardware to achieve state-of-the-art performance benchmarks. It involves algorithm-hardware co-design, performance modeling, and contributing to the future hardware/software roadmap, with a strong emphasis on publishing research findings at top-tier venues.

What you'd actually do

  1. Design and implement challenging scientific computing and AI workloads on Cerebras’ Wafer-Scale Engine, targeting performance results that advance the state of the art.
  2. Lead algorithm–hardware co-design efforts with internal R&D teams and external research partners, turning architectural capabilities into measurable application-level advantages.
  3. Build analytical performance models that quantify bottlenecks, guide optimization, and inform future chip and compiler design decisions.
  4. Contribute to Cerebras’ multi-year technology roadmap by identifying high-impact workloads, proposing architectural experiments, and validating them on silicon.
  5. Publish findings and present at top-tier conferences and journals; represent Cerebras in the broader HPC and AI research communities.

Skills

Required

  • Deep experience in at least one of the following: computer architecture and accelerator design; parallel, distributed, or high-performance computing; numerical methods and scientific simulation; AI/ML theory and model design at a mathematical level.
  • Strong ability to analytically model and optimize the performance of complex systems and algorithms.
  • Proficiency in C and Python; comfort working close to hardware.
  • Excellent communication and interpersonal skills: able to present complex technical material to both specialist and cross-functional audiences, and to collaborate effectively in a fast-paced, small-team environment.

Nice to have

  • Computational science: researchers who can bring insights from numerical methods and simulation into AI, or couple simulation and learning into joint computational workflows. Depth in hydrodynamics, solid mechanics, electromagnetics, molecular dynamics, or related PDE-based fields.
  • AI/ML foundations: deep understanding of model architecture, optimization methods, and their statistical underpinnings—the ability to design from first principles, not just apply established recipes.
  • Computer architecture: microarchitecture design, computing paradigms at the circuit and datapath level, memory hierarchy design.
  • Performance engineering: roofline modeling, bandwidth analysis, kernel optimization, communication-computation overlap, and compiler-level tuning for novel hardware.

What the JD emphasized

  • PhD in Computer Science, Engineering, Applied Mathematics, Physics, or a related quantitative field preferred
  • Track record of published research or patents in relevant venues

Other signals

  • design and implement workloads that establish new performance benchmarks on wafer-scale hardware
  • leverages architectural features that no traditional platform offers
  • intersection of algorithm design, compiler co-optimization, and hardware architecture
  • publish findings and present at top-tier conferences and journals