Job Details:
Job Description:
The Role and Impact: At Intel, Analog Circuit Design Engineers are at the forefront of innovation, shaping the future of analog and mixed-signal IPs. This critical role involves designing, developing, and optimizing high-speed analog circuits in advanced process nodes, contributing directly to Intel's industry-leading products and technologies. As part of our high-speed IO design team, you will play a pivotal role in creating next-generation memory interface PHYs, driving power, performance, and functionality improvements in cutting-edge circuits. Your expertise will directly impact Intel's ability to deliver high-quality solutions to meet the ever-evolving demands of technology. Key Responsibilities: - Design, develop, and build analog circuits for advanced process nodes, enabling high-performance and robust functionality. - Perform circuit design, validation, extraction of chip parameters, and simulation of analog behavior models. - Optimize circuits for power efficiency, performance, area, timing, and yield goals. - Create test plans to verify designs against block microarchitecture specifications, evaluating test results for design validation. - Collaborate with cross-functional teams to define design specifications, collect feedback, and resolve design issues. - Conduct layout reviews and ensure optimal placement and routing in collaboration with architecture and layout teams. - Contribute to post-silicon debug and validation efforts to support high-volume manufacturing. - Continuously refine design methodologies and processes to improve turnaround time and design quality.
Qualifications:
Minimum Qualifications: - Bachelor's degree in Electrical Engineering or an equivalent specialized field, or equivalent experience as required for the role. - 13+ years with Master's degree, or 6+ years with PhD in analog circuit design. - Proficiency with industry-standard tools such as Cadence Virtuoso, Spectre, PrimeSim, HSPICE, ADE, and Custom Compiler. - Expertise in designing high-speed analog circuits such as TX/RX blocks, PLLs, DLLs, SerDes, and voltage regulators. - Strong fundamentals in CMOS design, circuit simulation, and high-speed analog design concepts. - Familiarity with DRC, LVS, and post-layout extraction tools. Preferred Qualifications: - Experience in post-silicon debug, electrical validation, and correlating measurements to simulations. - Knowledge of scripting languages such as TCL, Perl, Python, or C for design automation tasks. - Familiarity with modeling and simulation of high-speed interface interconnects and channels. - Strong problem-solving, analytical skills, and ability to work in a fast-paced collaborative team environment. - Demonstrated leadership experience, ability to mentor junior team members, and drive innovation in circuit design. If you are passionate about creating impactful designs, driving technological innovation, and collaborating with a talented team, we invite you to apply and take the next step in your career with Intel.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
- ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.