Asic Clocks Verification Engineer - New College Grad 2026

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking an ASIC Clocks Verification Engineer to join their GPU clocks group. The role involves verifying high-frequency clock structures, collaborating with design and verification teams, and debugging silicon bugs. Requires a Master's degree in Electrical Engineering, experience with SystemVerilog, UVM, Design Verification, Logic Design, Logic Synthesis, and scripting languages like Python or Perl.

What you'd actually do

  1. As a Clocks team member, you will be collaborating with other architects, ASIC designers and verification engineers to verify high frequency clock structures.
  2. Be able to engage with multiple teams and design the GPU clock structure to satisfy all the architectural constraints.
  3. Your understanding of general verification principles will be valuable to verify the clocks design.
  4. Together with other team members, we deliver clock information to SOC verification team, timing and DFT teams. You will use Perl to improve the productivity of the above teams.
  5. Collaborate with Software and product group to debug GPU clock silicon bugs in our new products.

Skills

Required

  • SystemVerilog
  • UVM
  • Design Verification
  • Logic Design
  • Logic Synthesis
  • Python
  • Perl

Nice to have

  • Electrical Engineering

What the JD emphasized

  • Master’s degree in Electrical Engineering (or equivalent experience)
  • Practical experience with SystemVerilog and Universal Verification Method (UVM)
  • Experience with Design Verification, Logic Design, and Logic Synthesis.