Asic Design Engineer Ii, Annapurna Labs - Cloud-scale Machine Learning Acceleration

Amazon Amazon · Big Tech · Cupertino, CA · Software Development

ASIC Design Engineer for AWS Machine Learning servers, focusing on custom SoCs like AWS Inferentia. Responsibilities include RTL design, microarchitecture, optimization for performance, power, and area, and collaboration with cross-functional teams.

What you'd actually do

  1. Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets
  2. Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements
  3. Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints
  4. Execute lint and clock domain crossing quality checks to ensure design integrity
  5. Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts

Skills

Required

  • Bachelor's degree or equivalent
  • 3+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
  • SystemVerilog
  • ASIC design
  • analytical and problem-solving skills

Nice to have

  • Master's degree in computer science or equivalent
  • 3+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
  • high-performance and power-efficient designs
  • interconnects
  • DMAs
  • Memory sub-systems
  • accelerator engines
  • debug and system level architectures