Asic Design Engineer - New College Grad 2026

NVIDIA NVIDIA · Semiconductors · Westford, MA

NVIDIA is seeking an ASIC Design Engineer for their NVLink ASIC Design team. The role involves designing and developing next-generation NVLink protocols, including microarchitecture development, RTL implementation, debugging, and optimization for performance and power goals. The position requires a Bachelor's degree in EE, CS, or CE, strong knowledge of Verilog/System Verilog, and experience with high-speed and low-power design methodologies.

What you'd actually do

  1. Engaging in and support the design and development of NVIDIA’s next generation NVLink protocol.
  2. Participating in microarchitecture development and document specifications.
  3. Implementing in RTL and debug working with the verification team to ensure that the design is functional and performant.
  4. Applying logic design skills to optimize and meet performance and power goals.
  5. Delivering a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.

Skills

Required

  • Verilog
  • System Verilog
  • high speed (>1GHz) design
  • low power design methodologies

Nice to have

  • Internships and/or project experience with Verilog/system verilog
  • Background with low power design methodologies
  • Experience with high speed design methodologies

What the JD emphasized

  • high speed chip to chip communication
  • high speed (>1GHz) design
  • low power design methodologies
  • high speed design methodologies