Asic Verification - Team Lead

Microsoft Microsoft · Big Tech · Santa Clara, CA +1 · Silicon Engineering

Seeking an ASIC Verification Team Lead to improve verification efficiency, define strategies, and own verification of complex flows at SoC, subsystem, or IP levels for Data Processing Units (DPUs). The role involves developing verification environments, running simulations, debugging failures, and leading performance modeling and post-silicon validation efforts.

What you'd actually do

  1. Improves verification efficiency through new and updated methodologies or tools. Defines verification strategies and test plans.
  2. Owns verification of complex flows at the system on chip (SoC), subsystem (SS), or intellectual property (IP) levels.
  3. Drives the development of verification environments, runs, and debugs simulations to drive quality.
  4. Influences the product life cycle from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff.
  5. Works collaboratively with various teams to define performance modeling requirements and ensure technology development planning meets needs.

Skills

Required

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • Technical engineering experience

Nice to have

  • Experience working with large verification projects, including cluster/subsystem and fullchip environments.
  • Ability to lead large scale verification execution, driving multiple senior level verification engineers across geographic regions towards project completion.
  • Develop comprehensive pre-silicon verification test plans based on design specifications and performance requirements.
  • Create and maintain UVM/SystemVerilog-based testbenches for block-level, cluster-level, fullchip and emulation verification
  • Comfortable and experienced with AI based tools to accelerate productivity.
  • Experience with coverage-driven verification, functional coverage, and code coverage analysis.
  • Execute simulations using industry-standard tools/languages (e.g., SystemVerilog, Perl, C/C++, Assembly, UVM, VCS, Simvision) and analyze results to identify and resolve design issues.
  • Understanding of digital design, computer architecture (ARM, RISC-V, MIPS), and verification methodologies.
  • Familiarity with AMBA protocols (AXI, AHB, APB), ethernet and PCIE interfaces
  • Collaborate with cross-functional teams to define verification scope, coverage goals, and debug strategies.
  • Document verification methodologies, test results, and debug findings for internal reviews and compliance.
  • Participate in design reviews, contribute to architecture discussions, and support post-silicon validation efforts.
  • Debugging skills and ability to work independently in a fast-paced environment.

What the JD emphasized

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience
  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience
  • equivalent experience