Cache Senior Design Engineer for the New AI Group

Intel Intel · Semiconductors · Petah-Tikva, Israel

Seeking a Senior Design Engineer with 10+ years of experience in Block Level design and 3+ years in Cache systems to join the AI industry's Habana group at Intel. Responsibilities include designing and implementing IP solutions, collaborating with cross-functional teams, and ensuring the quality and performance of IP designs. Requires B.Sc. in Electrical Engineering or Computer Engineering and strong RTL skills in System Verilog.

What you'd actually do

  1. designing and implementing IP solutions
  2. collaborating with cross-functional teams
  3. ensuring the quality and performance of IP designs

Skills

Required

  • B.Sc. in Electrical Engineering or Computer Engineering
  • 10 years of proven experience in Block Level design
  • 3 years of proven experience in Cache systems
  • Backend-RTL relevant skills
  • solving timing paths
  • restructuring components
  • area reduction
  • System Verilog
  • communication
  • teamwork
  • Ownership
  • accountability
  • analytical and problem-solving skills

What the JD emphasized

  • AI industry
  • AI Group
  • CTO AI NEX