Cad Design Engineer

AMD AMD · Semiconductors · Hyderabad, India · Engineering

CAD Engineer at AMD responsible for developing and supporting next-generation synthesis, place and route (PnR) flows for advanced technology nodes (3nm & 2nm). This role involves automation of PnR flows, collaboration with EDA vendors, and supporting global design teams to achieve optimal power, performance, and area (PPA) for SOCs.

What you'd actually do

  1. Responsible for developing Place and Route methodologies for various designs at advanced technology nodes
  2. Work seamlessly with synthesis and signoff (STA, extraction, Physical Verification) teams to achieve best-in-class PPA
  3. Drive power/performance/area (PPA) convergence for SOCs implementation
  4. Script out utilities to automate different pieces of the implementation flow
  5. Support design teams at global sites through multiple PnR flow stages including chip finish flows

Skills

Required

  • Master’s/Bachelor’s Degree in Electronics Engineering
  • 8-10 years of experience in CAD flow and methodology development
  • Proficiency in scripting and automation using Python, TCL, and Perl
  • Strong debugging capabilities
  • CAD-automation mindset
  • Strong problem-solving skills
  • analytical thinking
  • Team player
  • good work ethic
  • excellent communication skills

Nice to have

  • Minor in Computer Science
  • Hands‑on experience in PNR flows including multi-voltage & power-gated designs
  • Expertise with industry‑standard physical design tools Fusion Compiler and/or Innovus
  • Experience with synthesis, STA, Physical verification domains
  • Strong understanding of low-power flows includes UPF concepts, power-gating, isolation, level-shifter, voltage_areas, power-state tables, electrical checks using FM & VSI
  • Exposure to AI/ML concepts

What the JD emphasized

  • 3nm & 2nm technology nodes
  • automation of PnR flows
  • PPA convergence