Core and Patch Verification Engineer

Intel Intel · Semiconductors · Bangalore, India

This role focuses on the functional logic verification of an integrated SoC, ensuring it meets specifications. Responsibilities include defining and developing verification plans, test benches, and environments, executing these plans using emulation and simulation models, debugging issues in the presilicon environment, and collaborating with various design teams. The role also involves incorporating security activities into test plans and maintaining the verification infrastructure. Experience with Pre-Si validation, System Verilog OVM/UVM, and scripting languages like Python is required.

What you'd actually do

  1. Performs functional logic verification of an integrated SoC to ensure design will meet specifications.
  2. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
  3. Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
  4. Replicates, root causes, and debugs issues in the presilicon environment.
  5. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Skills

Required

  • System Verilog OVM/UVM
  • Scripting languages such as Python
  • Simics
  • RTL
  • Verilog
  • VHDL

Nice to have

  • Synopsys simulation and coverage tools
  • Assertion based verification

What the JD emphasized

  • Pre-Si validation
  • pre-Si verification