Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
- Design, develop, and maintain CAD tools and scripts to automate and streamline design tasks, verification processes, and data analysis.
- Administer and optimize the front-end compute environment, ensuring reliability, performance, and scalability.
- Provide technical support and training to design and verification teams on the use of CAD tools, scripts, and the compute environment.
- Identify opportunities to enhance front-end development workflows, implement improvements, and document best practices.
- Work closely with design, verification, and CAD teams to understand their needs, gather requirements, and deliver effective solutions.
Qualifications
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, or equivalent practical experience.
- 3 years of experience in coding or scripting languages (e.g., Python, TCL).
- Experience with front-end design, verification, integration teams on tools development, maintenance, or support.
Preferred qualifications:
- Experience in CPU or SoC design, debug, and verification flows.
- Experience working with RTL teams and design integration methodologies that improve team productivity and velocity.
- Experience with delivering chip design infrastructure or methodology including multi-HDL model builds and CI/CD systems.