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Role Summary
We are looking for aStaff Engineer with strong virtualization and hypervisor fundamentals to drive post‑silicon validation of CPU cores. The engineer will leverage virtualized workloads and customer‑representative scenarios to stress core microarchitecture, identify silicon issues early, and collaborate with design, uCode/FW, BIOS, and platform teams to root‑cause and resolve issues.
This role treats virtualization as a primary validation and bug‑hunting vector, rather than a feature enablement check, to uncover real‑world core issues under production‑like stress.
Key Responsibilities
- Execute post‑silicon cores validation using virtualization‑based workloads and scenarios
- Configure, deploy, and debug workloads on hypervisors (KVM, VMware, Hyper‑V, Xen) across Linux and Windows environments
- Design and run VM‑based stress tests (migration, pause/resume, overcommit, multi‑VM contention, long‑run soak, reset scenarios) to expose core‑level bugs
- Analyze system failures and triage issues spanning core microarchitecture, uCode, FW, BIOS, DF/UMC, and platform interactions
- Correlate failures using logs, MCA, MSRs, debug hooks, and limited post‑silicon observability
- Work closely with design and architecture teams to provide actionable debug data and validation feedback
- Contribute to automation and scalable execution infrastructure for large‑scale virtualization runs
- Track coverage, execution hours, and defect trends to ensure production‑quality readiness
Required Qualifications
- Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, Computer Science, or related field
- Strong hands‑on experience with virtualization technologies and hypervisors (KVM, VMware ESXi, Hyper‑V, Xen)
- Solid understanding of x86 CPU architecture and core microarchitectural concepts
- Experience in Linux internals (scheduler, memory management, interrupts) and system‑level debugging
- Familiarity with post‑silicon validation, silicon bring‑up, or system validation
- Ability to debug complex issues across HW/SW boundaries
Preferred Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
- Prior experience in CPU cores post‑silicon validation or core stress testing
- Knowledge of microcode, BIOS, firmware, and platform initialization flows
- Exposure to customer‑like server or client virtualization workloads
- Experience with automation frameworks and large‑scale validation infrastructure
- Strong data analysis and root‑cause skills for low‑frequency, long‑run failures
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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
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This posting is for an existing vacancy.