Cpu Physical Design Automation Engineer

Intel Intel · Semiconductors · Texas, Austin, United States

This role focuses on the automation of CPU physical design, including synthesis, place and route, and signoff analysis. It involves developing and debugging tools and flows for high-performance CPUs, working with EDA vendors, and scripting for design automation. The role requires experience in hardware design, VLSI, and scripting languages like Python, Perl, or Tcl.

What you'd actually do

  1. Developing, debugging, and supporting tools, flows, and methodologies covering backend physical design methodologies and flow automation for high-performance blocks and full chip level using RTL2GDS standard cell level design techniques.
  2. Performing analysis of either synthesis, place and route, floor planning or signoff for static timing analysis on timing paths, formal equivalence verification, power consumption, electrical rule checking, and circuit reliability to identify key issues.
  3. Working closely with design teams to understand and debug tool issues and constraints.
  4. Working with industry EDA vendors to build and enhance tool capabilities to design a high-speed, low-power synthesizable CPU.
  5. Creating documentation and helping with guidelines/specs.

Skills

Required

  • Bachelor's Degree in Computer Engineering and/or Electrical Engineering
  • Python, Perl, and/or Tcl scripting languages
  • hardware design and engineering
  • VLSI
  • design automation algorithms
  • transistor-level design

Nice to have

  • Master's Degree in Computer Engineering and/or Electrical Engineering
  • microprocessor or other high speed design backend design
  • Synopsys, Cadence and/or Mentor Graphics EDA tools/flows
  • synthesis
  • place-and-route
  • extraction
  • timing/power analysis
  • functional verification
  • timing closure methodology
  • static timing analysis / STA
  • statistical variation analysis
  • spice circuit simulation
  • ERC
  • noise analysis flows
  • cross talk
  • OCV effects
  • budget constraints

What the JD emphasized

  • 4+ years of relevant working experience
  • 3+ years of experience
  • 1+ years of experience in hardware design and engineering
  • 1+ years' experience with Python, Perl, and/or Tcl scripting languages.