Cpu–soc Mask Layout Designer (diploma Level Contract Role) - Silicon Engineering Group (sig)

Intel Intel · Semiconductors · Penang, Malaysia +1

Diploma level contract role for a CPU-SoC Mask Layout Designer at Intel, focusing on the training, design, and development of next-generation SOC/CPU. Responsibilities include creating mask layouts, running verification tools, designing floorplans, and troubleshooting layout issues. Requires a Diploma in Electrical and Electronic Engineering and offers hands-on experience in semiconductor design.

What you'd actually do

  1. Creates mask layouts of integrated circuits for a given specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.
  2. Creates accurate designs that meet project needs, applying understanding of design manuals, established processes, layout elements, and basic electronic principles.
  3. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.
  4. Designs and analyses floorplans, power grid, and bumps and performs all required verification on the layout blocks.
  5. Troubleshoots a wide variety of issues up to and including layouts and tool/flow/methodology used in layout design.

Skills

Required

  • Diploma in Electrical and Electronic Engineering or related fields
  • Strong technical fundamentals
  • good communication skills
  • proficiency in English
  • Curious, motivated, and eager to grow in semiconductor design
  • Candidates must be open to contract-based position
  • Candidates must be willing to work in Penang location
  • Positions open only to Diploma fresh graduate

Nice to have

  • Unix
  • VLSI
  • SoC/CPU Architecture
  • System Verilog