Job Details:
Job Description:
Group Overview:
This group performs development of IP building blocks and methodologies for Intel’s System On Chip (SoC) solutions for the different market segments.
Experience** :** Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification
- Expertise in design, development and integration of design blocks (IP) for system-on-chip (SoC) components.
- Expertise in verilog and system verilog based logic design.
- Experience in Design Quality check tools like linting, synthesis / timing closure, CDC, LEC etc
- Experience in one/more of the following areas PCI_Express, and /or AMBA standards ( AXI, AHB etc..)
- Knowledge of use of AI tools like Github Copilot.
- Knowledge of SVA.
- Knowledge of RAS domain is a plus.
- Looking for highly motivated individuals and ability to deal with ambiguity.
- Knowledge of considerations for performance, power and cost optimization is desirable.
- Ability to work in a team environment.
Responsibilities** : **In this position, the candidate will be responsible for the microarchitecture and design of soft IP cores for Intel’s next generation chips (including SOCs) for the different
Qualifications:
Qualification** **:
–Master of Science (or a Master of Technology) degree in Electrical Engineering with more than four years of relevant industry experience or a Bachelor of Science (Bachelor of Technology) degree in Electrical Engineering with more than six years of relevant industry experience.
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
- ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.