Design Verification Engineer

AMD AMD · Semiconductors · Santa Clara, CA · Engineering

AMD is seeking a Design Verification Engineer to join their team, focusing on delivering high-quality, industry-leading technologies. The role involves analyzing complex verification and digital design problems, driving test planning and execution, collaborating with RTL, PHY, and firmware teams, and owning coverage closure. The engineer will also develop and enhance verification infrastructure and automation. Experience with memory subsystems, high-speed interfaces, System Verilog, UVM, C/C++, and scripting is preferred.

What you'd actually do

  1. Analyze complex verification and digital design problems and propose verification / micro-architecture solutions.
  2. Drive test planning, development, and execution (directed + constrained random), including debug and root cause analysis across RTL, PHY, and firmware.
  3. Collaborate closely with RTL, PHY, Architecture, and Firmware teams to ensure feature completeness and design correctness.
  4. Own coverage closure (functional + code) and signoff criteria, ensuring high-quality tape out readiness.
  5. Develop and enhance verification infrastructure, automation, and flows to improve efficiency and scalability across projects.

Skills

Required

  • System Verilog
  • UVM
  • modern verification methodologies
  • C/C++
  • Python
  • Perl
  • TCL
  • coverage-driven verification
  • assertions (SVA)
  • formal methodologies
  • scripting skills
  • performance validation
  • stress testing
  • corner-case verification
  • communication skills

Nice to have

  • DDR4/DDR5/LPDDR memory subsystems
  • Memory Controller verification
  • PHY verification and integration
  • high-speed interface protocols
  • timing/initialization sequences
  • FW–HW co-verification
  • co-simulation environments
  • debugging RTL, PHY behavior, and firmware interactions
  • simulation/emulation tools