Design Verification Engineer

AMD AMD · Semiconductors · MARKHAM, Canada · Engineering

Design Verification Engineer for AMD's graphics processor IP. Responsibilities include planning, building, and executing verification tests, debugging failures, and collaborating with architects and engineers. Requires proficiency in IP level ASIC verification, UVM, Verilog, System Verilog, C/C++, and debugging firmware/RTL.

What you'd actually do

  1. Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  2. Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  3. Estimate the time required to write the new feature tests and any required changes to the test environment
  4. Build the directed and random verification tests
  5. Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

Skills

Required

  • Bachelors or Masters degree in computer engineering/Electrical Engineering
  • Proficient in IP level ASIC verification
  • Proficient in debugging firmware and RTL code using simulation tools
  • Developing UVM based verification frameworks and testbenches, processes and flows
  • Proficient in using UVM testbenches and working in Linux and Windows environments
  • Experienced with Verilog, System Verilog, C, and C++
  • Assembly-level debugging ability
  • Scripting proficiency in Perl or Python
  • Practical experience with functional and code coverage analysis and closure
  • Automating workflows in a distributed compute environment
  • Build and improve verification frameworks, regression quality, and automation workflows

Nice to have

  • Exposure to leadership or mentorship is an asset
  • Solves complex, novel, and non-recurring problems; initiates and leads significant method/process improvements.
  • Owns processes of significant technical importance, including outcomes in own area and interdependent areas.
  • shell/Makefile/Ruby beneficial

What the JD emphasized

  • no bugs in the final design