Design Verification Engineer, Annapurna Labs

Amazon Amazon · Big Tech · CA, ON +1 · Applied Science

Design Verification Engineer for AWS custom silicon, focusing on high-speed I/O and scale-up/out components for ML accelerators like Inferentia and Trainium. Responsibilities include developing and executing verification plans, building simulation environments, creating test scenarios, and driving coverage closure.

What you'd actually do

  1. Own the development and execution of verification plans for components at sub-system and chip levels
  2. Build and implement verification environments using advanced simulation methodologies and industry-standard tools
  3. Define, create and execute comprehensive test scenarios covering system-level flows, critical paths, and corner cases
  4. Drive coverage closure and verification sign-off to ensure high-quality, tape-out ready design

Skills

Required

  • Bachelor's degree in Electrical Engineering or a related field
  • test plan development
  • test bench infrastructure development
  • test development
  • design verification
  • constrained-random simulation techniques
  • UVM
  • testbench development
  • stimulus
  • checkers
  • assertions
  • coverage

Nice to have

  • C/C++
  • Object-Oriented Programming
  • AMBA protocols
  • AHB/APB/AXI
  • interconnect protocols
  • PCIe
  • UCIe

What the JD emphasized

  • 4+ years of experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design
  • 4+ years of design verification experience using constrained-random simulation techniques (such as UVM)
  • 4+ years of experience in testbench development including stimulus, checkers, assertions and coverage