Dft Engineer

AMD AMD · Semiconductors · Singapore · Engineering

DFT engineer will lead a strong engineering team on Scan, MBIST, iJTAG test development of latest AMD products. The IPs range from complex processors, AI computation blocks, to state-of-the-art controller IPs which provide automotive, data center, machine learning and high-speed communication solutions. You will work closely with designers to make sure DFT structures are correctly implemented, with test engineers to make sure ATE test programs can be generated from the DFT (ATPG, MBIST) tools, with product engineers to make sure scan/MBIST production test can run seamlessly and stable, and with yield engineers to debug and root-cause failures/defects. You will get the opportunity to expand technical knowledge beyond DFT into embedded processor firmware, complex chip simulation, RTL implementation for ASIC & FPGA and deep silicon debug works all the way to high-volume production requirement. This is the role to oversee complete silicon cycle from design to production phases.

What you'd actually do

  1. Manage DFT engineers resolving technical challenges and meeting product schedule
  2. The role is in AMD global quality and operation organization driving best manufacturing test solution through pre and post silicon activities
  3. Work closely with design teams and make sure DFT structures are correctly implemented.
  4. Responsible for developing, implementing and verifying DFT schemes on hard-IPs in AMD ASIC and FPGA products.
  5. Responsible for developing and implementing techniques to test digital logic, using Scan Compression, Stuck-at, Transition and Path-Delay fault models

Skills

Required

  • DFT pre and post silicon cycles
  • creating and implementing complex chip-level DFT architecture
  • DFT implementation including Scan and Scan Compression at IP and SoC level
  • DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression
  • MBIST knowledge
  • logic design using Verilog
  • synthesis
  • STA
  • developing test benches
  • simulation in RTL/GATE/SDF environments
  • post-silicon debug
  • bench equipment (e.g., oscilloscope and logic analyser)
  • communication skills
  • works well in a group environment that spans across continents
  • Linux environment
  • scripting languages such as Perl, Tcl, etc

Nice to have

  • Tessent Streaming Scan Network SSN
  • FPGA synthesis and design flow