Dft Silicon Design Engineer

AMD AMD · Semiconductors · New Dehli, India · Engineering

This role is for a DFT Silicon Design Engineer at AMD, focusing on the architecture, design, and implementation of Design-for-Test (DFT) and Design-for-Debug (DFD) features for ASIC products. The engineer will develop RTL for DFT features, perform integration, synthesis, timing analysis, and verification, and work with multi-functional teams. Experience with DFT techniques like JTAG, Scan, ATPG, and memory BIST is preferred, along with knowledge of Verilog, scripting languages, and EDA tools.

What you'd actually do

  1. Develop RTL for ASIC design-for-test (DFT) features as per architectural or design flow automation specifications.
  2. Perform DFT RTL design integration, insertion, synthesis, equivalency checking, timing analysis and defining constraints, verification of DFx logic at RTL and GLS, ATPG and Scan GLS.
  3. Work with multi-functional teams and handling schedules

Skills

Required

  • Bachelor’s or Master’s degree in electrical/Electronic Engineering
  • UNIX/Linux
  • Verilog
  • Verilog simulator
  • waveform debugging tools

Nice to have

  • DFT techniques such as JTAG/IEEE standards, Scan and ATPG, memory BIST/repair or Logic BIST
  • scripting languages (e.g. TCL, c-shell, Perl)
  • EDA tools/methodology, such as synthesis, equivalency checking, static timing analysis
  • Strong problem-solving skills
  • Team player with strong communication skills