Dft Verification Engineer

AMD AMD · Semiconductors · Bangalore, India · Engineering

This role is for a DFT Verification Engineer focused on SoC design verification for server programs. The responsibilities include developing testbenches, debugging complex issues, and ensuring the quality of silicon designs. While the company mentions AI and uses AI in its hiring process, the core craft of this role is not AI/ML model development or deployment.

What you'd actually do

  1. Looking for strong 4 to 12 years of experience in SoC Design Verification engineers for Server SoC programs
  2. Must have experience with ARM / x86 processor-based SoC/IP DV
  3. Good understanding of ATE / ATE functional patterns / sort functional coverage
  4. Hands-on exposure to DFT concepts – SCAN / MBIST and test-mode interactions
  5. Strong debug skills – ability to root-cause complex processor/system issues

Skills

Required

  • SoC Design Verification
  • ARM / x86 processor-based SoC/IP DV
  • DFT concepts (SCAN / MBIST)
  • SystemVerilog / UVM
  • testbench development
  • DV sign-off
  • debug skills
  • reset/boot flows
  • architecture-level validation

Nice to have

  • ATE / ATE functional patterns / sort functional coverage
  • SerDes loopback / IO validation / post-silicon debug exposure

What the JD emphasized

  • SoC Design Verification engineers
  • Server SoC programs
  • ARM / x86 processor-based SoC/IP DV
  • DFT concepts
  • debug skills
  • next-gen server silicon programs