As the Director of Hardware Engineering, you will set the technical vision and lead the execution for our next generation of compute and machine learning infrastructure. Operating at the highest levels of technical leadership, you will be the driving force behind the integration of complex ASICs, TPUs, GPUs, and advanced networking hardware into our data center roadmap.
This role requires a hardware leader who has lived through the trenches of high-velocity development and understands the brutal realities of deploying at hyperscale. You will bridge the gap between bleeding-edge silicon design and massive volume data center deployment, anticipating fleet-level challenges before they happen. You will guide cross-functional teams, align external JDMs and CMs, and ensure our hardware scales reliably meet the unrelenting demands of our global infrastructure.
Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users.
The US base salary range for this full-time position is $275,000-$383,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Lead the systems engineering strategy for next-generation data center hardware, seamlessly integrating cutting-edge networking, custom ASICs, TPUs, GPUs, and standard server technologies.
- Drive products from v0 architecture through to volume production and data center deployment. Anticipate, troubleshoot, and mitigate complex, fleet-wide deployment challenges in a high-demand HPC environment.
- Steer technical engagements and partnerships with JDMs and CMs to ensure high-quality, high-yield volume manufacturing.
- Serve as the ultimate technical authority on system-level performance, heavily leveraging your deep expertise in signal integrity, power integrity, and managing complex PCB variations across massive production runs.
- Elevate the engineering standards across the organization. Provide technical guidance and mentorship to senior engineers across hardware, silicon, and data center operations teams.
Qualifications
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, System Architecture, a related field, or equivalent practical experience.
- 15 years of experience in hardware development, systems engineering, or architecture within a high-velocity, high-demand environment (e.g., hyperscale cloud providers, high-performance computing).
- Experience evaluating, managing, and partnering with JDMs and CMs to bring hardware to market.
Preferred qualifications:
- Master’s degree or PhD in Electrical Engineering, Computer Science, or a related technical field.
- Expert-level knowledge of Signal Integrity (SI) and Power Integrity (PI) challenges in high-speed, high-power designs (e.g., PCIe Gen 5/6, 400G/800G networking, high-TDP AI accelerators).
- Understanding of PCB manufacturing variations, material science and how they impact system reliability at data-center scale.
- Demonstrated ability to navigate ambiguity, resolve complex technical trade-offs, and drive consensus across large, globally distributed engineering organizations.
- Technical expertise spanning networking architectures, ASIC/TPU/GPU integration, and enterprise/cloud server technology.