Firmware Memory Engineer

AMD AMD · Semiconductors · Austin, TX · Engineering

This role focuses on the firmware design and development for high-speed memory interfaces (LPDDR, DDR) and inter-chip IO IPs. It involves pre- and post-silicon development, including RTL, firmware/hardware co-design, and algorithm design for memory PHYs. The responsibilities include firmware design for DDR PHY & DRAM Training, ATE testing, lab bring-up, and optimization for robust links. While the company mentions AI and data centers, the core of this role is in firmware engineering for memory hardware, not AI model development.

What you'd actually do

  1. Firmware design and development of DDR PHY & DRAM Training steps
  2. Firmware development of DDR PHY for ATE Testing, IP Char & SoC Power
  3. Pre-silicon FW coding and simulation against Architectural and RTL models
  4. Post-silicon lab bring-up and optimization of DDR Init and Run Time FW
  5. Post-silicon DDR Training enhancements to enable robust links for higher reliability / higher frequency margin
  6. Working with SoC/Product firmware teams to define features and specs

Skills

Required

  • Excellent knowledge of C, C++
  • Post-silicon experience developing firmware on real hardware is required

Nice to have

  • scripting language, such as Python
  • Verilog/SystemVerilog and digital simulation debug
  • Ability to adapt learn new toolsets and frameworks
  • Strong understanding of synchronization techniques (handshakes, message passing)
  • SERDES, DDR, Memory Controller Design experience
  • Strong understanding of computer organization/architecture
  • Laboratory experience, including the use of equipment: oscilloscopes, logic analyzers, etc.
  • Experience with low level, physical phenomena-oriented logic design
  • knowledge of hardware level clocking and synchronization
  • Master's or PhD degree

What the JD emphasized

  • Post-silicon experience developing firmware on real hardware is required