Formal Verification Engineer

AMD AMD · Semiconductors · Bangalore, India · Engineering

Formal Verification Engineer at AMD working on full chip SoC formal verification convergence with RTL and physical design engineers. This role focuses on ensuring robust design through formal verification methods and potentially ECO generation, with a strong emphasis on accuracy and detail.

What you'd actually do

  1. Work on full chip Formal Verifcation on multiple ASICs across different technology nodes.
  2. Work closely with architecture, RTL and Physical Design team to ensure robust design
  3. Work witih RTL and PD team on Conformal ECO generation to reduce TAT
  4. Work closely with CAD team to come up with new flows and methodologies in the FV domain

Skills

Required

  • 8+ years of professional experience in the industry in formal verification
  • Proficient in IP and Full Chip Formal Verification
  • Proficient in debugging issues related to formal verification
  • Hands on expericene in Cadence LEC/Synospsy Formality
  • Working knowledge of Conformal ECO generation methodology
  • Automating workflows in a distributed compute environment.
  • Scripting language experience: Perl, Tcl, Makefile, shell
  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice to have

  • Exposure to leadership or mentorship is an asset