Formal Verification Engineer - New College Grad 2026

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

This role focuses on the formal verification of RTL units for NVIDIA's next-generation chip designs, requiring deep knowledge of architectural and micro-architectural details, strong analytical skills, and experience with formal verification techniques and methodologies.

What you'd actually do

  1. Developing comprehensive FV testplan documents.
  2. Identifying key behaviors for verification of DUT and creating a verification plan.
  3. Developing verification environments including environment assumptions, assertions, and cover properties in context of the verification plan.
  4. Applying various FV techniques to proof correctness of digital designs.
  5. Debugging RTL to identify failure scenarios.

Skills

Required

  • BS or MS in CS/CE/EE/Mathematics or equivalent experience.
  • Strong analytical skills to solve difficult problems.
  • Knowledge/Experience in formal verification techniques.
  • Strong knowledge of architectures of CPU/GPU designs and digital logic.
  • Understanding of abstraction techniques for effective verification.
  • Hands-on experience with HDLs such as Verilog / SystemVerilog.
  • Ability to understand RTL quickly.

Nice to have

  • Preferable experience with Formal Verification Tools (e.g., Jasper, VC Formal)

What the JD emphasized

  • Knowledge/Experience in formal verification techniques.
  • Strong knowledge of architectures of CPU/GPU designs and digital logic.
  • Hands-on experience with HDLs such as Verilog / SystemVerilog.