Fpga Engineer III

F5 F5 · Enterprise · Spokane, WA

FPGA Engineer III at F5 responsible for designing, implementing, and validating high-performance FPGA-based solutions for networking products. This role involves RTL coding, simulation, hardware debugging, and performance analysis, with a focus on high-speed interfaces and collaboration with cross-functional teams.

What you'd actually do

  1. Design and implement advanced FPGA modules, including RTL coding and logic partitioning, using System Verilog.
  2. Develop verification plans and self-checking simulation test environments to verify system functionality and ensure design robustness, using System Verilog / UVM-based verification environments.
  3. Contribute to architectural decisions, develop module micro-architectures, and ensure designs operate seamlessly with other modules in the system.
  4. Debug and validate FPGA designs in lab environments using tools such as oscilloscopes, logic analyzers, and traffic generators like IXIA, in a Python based lab test infrastructure.
  5. Analyze design data and lab results to validate expected performance metrics, guide optimizations, and produce thorough documentation.

Skills

Required

  • FPGA development
  • RTL coding
  • System Verilog
  • verification plans
  • simulation test environments
  • UVM
  • debugging
  • hardware validation
  • performance analysis
  • high-speed interfaces
  • PCIe
  • Ethernet MACs
  • AXI
  • Electrical Engineering
  • Computer Engineering

Nice to have

  • Ethernet networking fundamentals
  • memory architectures and interfaces
  • bus analyzers
  • oscilloscopes
  • logic analyzers
  • traffic generation tools
  • IXIA
  • GitLab
  • Perforce
  • AI tools
  • GitLab Duo
  • GitHub Copilot
  • ChatGPT

What the JD emphasized

  • 4–6 years of industry experience in FPGA development, including RTL coding in System Verilog.