Fvcto - Formal Verification Specialist

Intel Intel · Semiconductors · Bangalore, India

This role focuses on formal verification of microarchitecture using industry-standard tools and algorithms for server, client, and graphics IPs. The engineer will define verification scope, deploy strategies, create abstraction models, and ensure design correctness and quality on schedule. Experience with RTL languages, assertion languages, and formal verification principles is required.

What you'd actually do

  1. Verify microarchitecture using industry standard Formal Verification tools and technologies based on latest model checking and equivalence checking algorithms on world class design IPs & SOCs for Server, Client and Graphics.
  2. Use the hardware architecture design and RTL implementation details.
  3. Define the Formal Verification scope, deploy the right strategy to prove the correctness while deploying advanced formal techniques, and create abstraction models for convergence on the design.
  4. Carve out the right boundaries for the design, create comprehensive formal verification test plans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a high-quality design on schedule and articulate the ROI.
  5. Analyses new methodologies, evaluates new tools and corroborates results.

Skills

Required

  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 8 years relevant experience or schoolwork OR Master’s Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with 7 years relevant experience or schoolwork OR PhD in Electrical Engineering, Computer Engineering, Computer Science or a related field with 3 year relevant experience or schoolwork
  • RTL languages like System Verilog or VHDL
  • Assertion languages like SVA, formal verification.

Nice to have

  • The fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs
  • Formal verification principles and methods
  • Computer architecture, digital design and verification methods
  • Research in formal verification domain

What the JD emphasized

  • Formal Verification
  • model checking
  • equivalence checking
  • assertion languages
  • RTL languages