Graduate Trainee - Product Development Engineer (signal Integrity)

AMD AMD · Semiconductors · Penang, Malaysia · Engineering

This role is for a Graduate Trainee Product Development Engineer specializing in Signal Integrity at AMD. The engineer will be responsible for SI specification definition, modeling, analysis, and verification for AMD's server products, working closely with cross-functional teams from die to board level. Responsibilities include electromagnetic modeling, SI simulations for high-speed links and memory buses, and collaborating on test plans and fixes. The role requires a Bachelor's or Master's in electrical or computer engineering and offers experience in advanced signal integrity concepts and tools.

What you'd actually do

  1. Work closely with cross-functional team and internal working group on current and next gen Server’s platform in meeting signal integrity in HVM solution space
  2. Electromagnetic modeling of 3-D structures including vias, connectors, sockets
  3. Verify and correlate post-silicon measurement against spec and collaborate fixes if needed to feedback on the next derivation silicon.
  4. Collaborate with working group leads for signal measurement test plans and review of measurement results.
  5. Deliver channel optimization (board and package), model creation and verification and simulate the overall performance to meet the channel performance. Document reports and BKM for future references.

Skills

Required

  • Bachelor’s or Master’s in electrical engineering, computer engineering, or comparable disciplines

Nice to have

  • Transmission line theory and microwave engineering concepts such as S-parameter, etc.
  • Low-voltage swing signaling technologies.
  • System-level timing analysis considering effects from silicon IO, package, and board.
  • I/O driver/receiver modeling for state-of-the-art high-speed digital logic.
  • In-depth knowledge of I/O buffer modeling, specifically behavioral (IBIS like) modeling for high speed digital logic.
  • Deep expertise in at least one of the following: PCIeX Physical layer, LPDDR4/5, Power delivery design, 100+Gig interfaces.
  • Hands on experience in either Silicon design or board design will be highly advantageous.
  • High motivation to continuously learn and resolve new challenges
  • People skills and team spirit
  • Expertise in analog simulation with Seasim, S2eye, Hspice, ADS, ANSYS, or other toolsets.
  • Expertise in 3-D modeling with ANSYS HFSS/Q3D and 2.5-D with ANSYS SIWAVE.
  • Expertise with DSO, TDR, VNA, ParBERT measurement tools/techniques.