Hsio Validation Execution Engineer

AMD AMD · Semiconductors · Austin, TX · Engineering

This role focuses on the post-silicon validation of high-speed IO for AMD's datacenter CPU and AI GPU systems. The engineer will develop and execute test plans, create test content, develop validation infrastructure, and collaborate with cross-functional teams to debug platform and SoC issues. The role requires expertise in high-speed IO interfaces like PCIe and CXL, server platform components, and strong debug skills. While the role supports AI GPU systems, the core function is validation engineering for hardware infrastructure, not AI model development or deployment.

What you'd actually do

  1. Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across AMD Server and AI products in high-speed IO
  2. Develop test content for both focus testing as well as system level stress testing of IO domain plus cross product stress testing
  3. Exposure to functionally validating, regressing, executing and debugging Networking/IFoE/IB/UAL/Scale up/Scale out or related domains
  4. Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
  5. Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment. Drive the provide root cause analysis for platform level, SoC logical, performance and BIOS/firmware issues

Skills

Required

  • Develop and execute feature enablement and validation test plans
  • Develop test content
  • Validate, regress, execute and debug Networking/IFoE/IB/UAL/Scale up/Scale out or related domains
  • Develop post-silicon validation infrastructure
  • Provide root cause analysis for platform issues
  • Collaborate with cross-functional teams
  • PCIe
  • CXL
  • RAS
  • Power management
  • Server platform components
  • Linux
  • Microsoft Operating Systems
  • SoC/Platform level debug
  • Silicon bring up and debug
  • Programming/scripting language (C/C++, Python, Perl)
  • Board/platform-level debug
  • Handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
  • Organizational skills
  • Ability to prioritize multiple workstreams and meet tight deadlines

Nice to have

  • x86 or other complex CPU architectures
  • Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up)

What the JD emphasized

  • high-speed IO
  • AI GPU systems
  • post silicon validation
  • system level test-plan execution
  • SoC/Platform level