Implementation Methodology Engineer - GPU

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

This role is for an Implementation Methodology Engineer focused on front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation, and application support for NVIDIA's VLSI team. The engineer will work on improving power, performance, and area of critical designs using NVIDIA implementation flows and EDA tools, collaborating with designers and EDA vendors. The role requires a BS/MS in Electrical/Computer Engineering or equivalent, 4+ years of experience in logic/physical design implementation, deep understanding of logic optimization, physical design, and proficiency with synthesis/place and route EDA tools. Scripting skills in Python/Tcl are a plus.

What you'd actually do

  1. You will be responsible for all aspects of front-end design implementation methodologies (synthesis, formal-equivalence-checking), flow automation and application support.
  2. Use NVIDIA implementation flows and EDA tool expertise to improve power, performance and area on NVIDIA's most critical designs
  3. You will collaborate with logic designers, physical designers and EDA vendors to solve exciting implementation issues and develop new solutions.
  4. Provide support for EDA tools and flows

Skills

Required

  • BS or MS in Electrical Engineering, Computer Engineering, or related fields (or equivalent experience)
  • 4+ years of experience in logic design implementation and/or physical design implementation
  • Deep understanding of logic optimization techniques and relative area, timing, and power trade-offs
  • Strong understanding of physical design implementation eg: physical synthesis, placement, routing, logic restructuring, etc.
  • Power user of synthesis and/or place and route EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus)
  • Good debugging and problem-solving skills
  • Strong interpersonal skills

Nice to have

  • Prior experience in physical implementation
  • Proficiency in Python, Tcl, Make scripting

What the JD emphasized

  • 4+ years of experience in logic design implementation and/or physical design implementation
  • Deep understanding of logic optimization techniques and relative area, timing, and power trade-offs
  • Strong understanding of physical design implementation eg: physical synthesis, placement, routing, logic restructuring, etc.
  • Should be a power user of synthesis and/or place and route EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus)