Intel Foundry Process Td Frame Cellset Engineer

Intel Intel · Semiconductors · Oregon, Hillsboro, United States

This role is for an Intel Foundry Process TD Frame CellSet Engineer responsible for integrating scribeline cells into frame layouts for semiconductor fabrication. The role involves performing layout edits, dispositioning data changes, verifying cell placement, and ensuring proper frame data output. It requires expertise in semiconductor manufacturing processes, particularly lithography and metrology, and experience with CAD layout tools.

What you'd actually do

  1. Performing layout edits based on process design specifications and fab module owner guidelines.
  2. Dispositioning drawn data changes through XORs and/or design rule flows.
  3. Providing frame dimension and field configuration estimates to product design teams.
  4. Verifying the placement of the scribe line cells in the frame to meet fab process module BKMs as well as technology design specifications.
  5. Ensuring proper frame data output and validating the integrity of the frame through the tape out process.

Skills

Required

  • PhD in Electrical Engineering, Chemical Engineering, Materials Science, Industrial/Mechanical Engineering, or related field
  • Masters Degree in Electrical Engineering, Chemical Engineering, Materials Science, Industrial/Mechanical Engineering, or related field, with 3+ years of semiconductor manufacturing experience
  • Bachelor's Degree in Electrical Engineering, Chemical Engineering, Materials Science, Industrial/Mechanical Engineering, or related field, with 4+ years of semiconductor manufacturing experience
  • Experience in semiconductor manufacturing processes, particularly lithography and metrology.

Nice to have

  • CAD layout tools, desirable are familiarity with Cadence Virtuoso and Calibre design software
  • Design flow UNIX computing environments, and basic shell programming.