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THE ROLE:
AMD’s Infinity Data Fabric (DF) is a foundational interconnect technology used across all AMD product segments, including EPYC™, Ryzen™, Radeon™ (Vega, Navi), and Semi‑Custom products. We are seeking an engineer to contribute to the development and enablement of next‑generation high‑performance computing products.
In this role, you will be part of a cross‑functional team responsible for Infinity Fabric IP firmware development and feature enablement across AMD platforms. Your work will directly support silicon bring‑up, validation, and long‑term product quality across pre‑ and post‑silicon environments.
THE PERSON:
You have a strong interest in firmware development on bare‑metal or near bare‑metal environments. You can consider system‑level requirements when designing solutions that are scalable and maintainable, and you document your work clearly and concisely.
You collaborate effectively with others, contribute constructively to team discussions, and value shared ownership of outcomes. You prioritize code quality, robustness, and long‑term maintainability in your work.
KEY RESPONSIBILITIES:
- Develop and enable firmware features for the Infinity Fabric interconnect across AMD products, including design, documentation, unit testing, and debug for both pre‑ and post‑silicon environments.
- Enhance Python‑based tools that process large and complex datasets to generate hardware initialization binaries.
- Develop tools and infrastructure in Python and/or C/C++ to collect, process, and validate hardware initialization data.
- Collaborating with architects and IP leads to defining firmware scope and implementation details aligned with delivery milestones.
- Perform unit and integration testing, and provide debug support across emulation, simulation, and post‑silicon environments.
- Participate in design and code reviews to promote quality, reliability, and maintainability.
- Work with internal and external teams to support the firmware lifecycle and ensure high product quality.
PREFERRED EXPERIENCE:
- Experience with firmware development, integration, and validation for SoC designs in pre‑ and post‑silicon environments.
- Strong proficiency in low‑level C programming, including debugging and performance optimization for embedded systems.
- Proficiency in Python and Linux scripting for data parsing, automation, and processing.
- Solid understanding of computer architecture concepts such as memory interleaving, system memory maps, and NUMA domains.
- Experience with board, processor, or ASIC bring‑up using simulation and/or emulation platforms.
- Familiarity with hardware/software interfaces and structured debugging at the IP, subsystem, or system level.
- Experience using source control and code review systems such as Git and Gerrit.
- Clear written and verbal communication skills, including the ability to document designs and communicate technical concepts effectively.
- Ability to manage multiple priorities, work independently, and collaborate with geographically distributed teams.
ACADEMIC CREDENTIALS:
- BS or MS in Computer Science, Computer Engineering, or equivalent practical experience.
This role is not eligible for visa sponsorship.
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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
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This posting is for an existing vacancy.