Interconnect Micro-architect/rtl Design Engineer

AMD AMD · Semiconductors · Austin, TX · Engineering

AMD is seeking an Interconnect Micro-architect/RTL Design Engineer to help build the next generation coherent interconnect for CPUs, GPUs, and special purpose accelerators. The role involves architectural exploration, microarchitectural definition, RTL design, optimization for power/performance/area/timing, and participation in post-silicon debug.

What you'd actually do

  1. Early architectural/performance exploration through micro architectural definition and design.
  2. Optimize the design to meet power, performance, area and timing requirements.
  3. Write easily readable and synthesizable Verilog RTL.
  4. Run some unit level testing to deliver quality code to the Design Verification Team.
  5. Create assertions to improve coverage and cover points to analyze coverage of the design.

Skills

Required

  • Verilog RTL
  • digital electronics
  • high-speed designs(>1GHz)
  • multi-processor coherency
  • memory ordering
  • i/o ordering
  • interrupts
  • MMU
  • caches
  • debugging
  • analytical skills

Nice to have

  • System Verilog
  • C
  • C++
  • Perl
  • Python
  • Design for Test
  • scan concepts
  • DFT friendly RTL
  • x86 ISA
  • ARM ISA