Ip Design Engineer

AMD AMD · Semiconductors · San Jose, CA · Engineering

This role is for an IP Design Engineer at AMD, focusing on RTL design methodologies and AI-driven automation for Silicon implementation. The engineer will collaborate with architects and other engineers, build early-stage RTL designs, and enhance AI-driven infrastructure to accelerate IP integration. The role requires expertise in RTL design, VLSI flow, and scripting, with a Bachelor's or Master's in Computer Engineering or Electrical Engineering.

What you'd actually do

  1. Build early-stage RTL designs based on product and architecture intent driving Silicon and Solution co-development.
  2. Build and enhance AI-driven infrastructure to accelerate IP integration and improve development timelines.
  3. Apply data-driven methodologies to align engineering teams across next-generation products and technology nodes.
  4. Support functional simulation and software quality checks, ensuring robust verification coverage.
  5. Partner with global teams to achieve seamless integration and delivery.

Skills

Required

  • RTL design (Verilog/SystemVerilog)
  • VLSI design flow
  • Physical Implementation processes
  • EDA tools (Synopsys Design Compiler, Primetime, VCS; Cadence Virtuoso)
  • scripting (Perl, Tcl, Python, Shell)
  • Bachelor's or Master's in Computer Engineering or Electrical Engineering

Nice to have

  • Understanding of FPGA architecture and usage models
  • UVM/OVM verification, simulation environments, and debugging

What the JD emphasized

  • AI-driven automation
  • AI-driven infrastructure