Job Details:
Job Description:
- Defines, develops, and performs functional validation for Accelerator IPs, focusing on validation of the IP internals and the IPs integration in system level features.
- Have demonstrated strong IP validation experience, in pre and post silicon, system and integration testing, as well as good understanding of emulation, firmware and RTL knowledge.
- Possess an in-depth understanding of hardware architectures and knowledge of how to create end use scenarios.
- Strong technical background in developing test plan for pre and post silicon validation.
- Reviews proposed design changes to assess impact on validation plans, tasks, and timelines.
- Develops IP validation methodologies, executes validation plans, and collaborates with other engineers for design optimization, troubleshooting, failure analysis and debug.
- Performs silicon debug to identify root causes and resolves all functional and triage failures for IP issues. Hands on experience in PCIe, CXL.
- Prior hands-on automation script development and optimization (using C/C++, Python). Well versed in the usage of advanced lab equipment (scopes, BERTs, programmable power supplies, PCIe Analyzers etc).
- Good knowledge and experience in JTAG, Debug Access and Tools. Proven analytical and problem-solving abilities.
- Tests interactions between various IP features using validation infrastructure.
- Develops post silicon validation infrastructure (e.g., performance monitors, behavioral checkers, state space coverage) and test environment used in validation testing.
- Publishes IP validation reports summarizing all validation activities performed, reviews results, and communicates to relevant teams.
- Works with other validation engineers (e.g., platform, SoC, and sys debug) to understand bug escapes, debug IP related failures found in other environments, and close coverage gaps are plugged in for the subsequent IP/SoC.
- Good experience in architectural and design aspects of the validation tests suite development.
- Great team player, highly motivated to support the team with technical expertise and hands on experience in validation test cases development and debug. Excellent communication and leadership skill.
- Knowledge of High-Speed Oscilloscopes, Logic Analyzers, Data Acquisition Tools/Hardware.
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Qualifications:
Minimum Qualifications:
- Bachelor's Degree with 3+ years of total experience including experience in the following areas: Working/developing test plans. Developing in a Linux/UNIX environment.
- Object-oriented programming in coding any of the languages: C, C++, C#, Perl and/or Python Software.
- Hardware, system bring-up.
**Preferred Qualifications: **
- Master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.
- 3+ years of experience with one or more of the following: Hardware Validation test plans and test cases development and debug experience.
- Developing test automation experience. Debugging on emulation models. Experience with design and derive testing for system clock/system reset flows, IP concurrency.
- PCIe protocol and/or PCIe interfaces testing experience. Lab equipment (Logic Analyzers, Oscilloscopes, protocol analyzers).
Job Type:
Experienced Hire
Shift:
Shift 1 (India)
Primary Location:
India, Bangalore
Additional Locations:
Business group:
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
- ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.