Ip Methodology and Automation Engineer

Intel Intel · Semiconductors · Texas, Austin, United States

The role focuses on developing and enhancing tools, flows, and methodologies (TFM) for Intel's physical design implementation across IPs and SoCs. Responsibilities include conceptualizing and designing TFMs, establishing regression flows, optimizing power/performance/area/timing, creating automation scripts, analyzing data for improvements, and partnering with cross-functional teams. The role also involves architecting and developing regression and QA automation frameworks for semiconductor IP verification, integrating automation with development pipelines, and implementing monitoring mechanisms. Experience with EDA tools, physical design flows, scripting (TCL, PERL, Python), and CI/CD platforms is required.

What you'd actually do

  1. Conceptualize, document, and design TFMs used in physical design implementation for IPs and SoCs.
  2. Establish regression flows and drive improvements in RTL to GDS flows.
  3. Develop and implement methodologies to optimize power, performance, area, and timing in physical design constraints.
  4. Create innovative scripts, checkers, and CAD-based automation to simplify and accelerate design processes.
  5. Analyze retrospective data on current designs to identify quality and efficiency gaps, driving incremental and transformative improvements.

Skills

Required

  • Bachelors with 8+ years of experience or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 4+ years of professional experience; or PhD with 2+ years of experience.
  • Expertise with EDA tools, physical design flows, and methodologies.
  • Experience in TCL and PERL scripting for automation and flow development.
  • Experience with SoC integration and RTL to GDS design flows.

Nice to have

  • Hands-on experience with design optimization techniques, including synthesis, clock tree synthesis, place and route, and floor planning.
  • Experience with multi-power plane designs and integration of UPF methodologies.
  • Analyze and improve physical design performance metrics (power, timing, area).
  • Demonstrated project management experience handling multiple concurrent projects with excellent cross-team collaboration skills and proven ability to lead technical execution and drive results.
  • Expert-level proficiency in Python, Perl, Tcl, and SKILL with full-stack development experience and proven ability to build and maintain large-scale automation frameworks for complex technical environments.
  • Hands-on experience with Jenkins, GitLab CI platforms, SQL/NoSQL databases, and integrating AI/ML technologies into automation frameworks for enhanced testing capabilities.
  • Deep understanding of semiconductor IP design flow, verification processes, and EDA tools combined with strong analytical and troubleshooting capabilities for complex technical challenges.

What the JD emphasized

  • Expertise with EDA tools, physical design flows, and methodologies.
  • Expert-level proficiency in Python, Perl, Tcl, and SKILL with full-stack development experience and proven ability to build and maintain large-scale automation frameworks for complex technical environments.