Ip Post-silicon Validation Engineer

AMD AMD · Semiconductors · MARKHAM, Canada · Engineering

This role is for an IP Post-Silicon Validation Engineer at AMD. The primary focus is on validating hardware IP for AMD's APU, CPU, Compute, and Discrete Graphics SOC programs. Responsibilities include defining and executing test plans, debugging IP issues, and collaborating with cross-functional teams on pre-silicon activities. The role also involves developing and enhancing validation tools and methodologies. While the company mentions AI and next-generation computing, the core responsibilities of this specific role are in hardware validation and engineering, not direct AI/ML model development or deployment.

What you'd actually do

  1. Defining, documenting, executing and reporting the overall functional test plan and validation strategy for a set of AMD IP’s.
  2. Driving technical innovation to enhance AMD's capabilities in IP validation, including tools and scripts/automation development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives.
  3. Debugging IP issues found during pre-silicon, bring-up, system validation, and production phases of the SOC programs.
  4. Engaging on pre-silicon ‘shift left’ activities with cross-functional teams such as Design Verification (DV), Diagnostics, Emulation and other software/hardware modeling frameworks to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features.
  5. Leading collaborative technical discussions to drive resolution of technical issues and roll out technical initiatives.

Skills

Required

  • Bachelor’s or master’s degree majoring in EE, CS or related field
  • Excellent written and verbal communication skills
  • Self-starter and able to independently drive tasks to completion

Nice to have

  • Experience in digital logic design/verification/post-silicon validation
  • Extensive experience with ASIC debug techniques and methodologies
  • Knowledge of physical and protocol levels of common high-speed interfaces such as PCIe/CXL/UALINK
  • Experience with board/platform-level debug, including clock/power delivery, sequencing, analysis, and optimization
  • Strong scripting skills (eg. Ruby, Python)
  • Extensive experience with common lab equipment, including protocol/logic analyzers, oscilloscopes, etc.
  • In-depth knowledge of PC architectures/PCIe protocol
  • Team player with excellent communication skills and experience collaborating with other engineers located in different sites/timezones
  • Strong analytical and problem-solving skills
  • Willing to learn and ready to independently drive tasks to completion
  • Leadership and mentoring skills