Ip Verification Engineer

AMD AMD · Semiconductors · San Jose, CA · Engineering

AMD is seeking an IP Verification Engineer to join their AECG Group. The role involves verifying cutting-edge FPGAs and ASICs for various customers, collaborating with architecture, IP design, PD, and product engineering teams. Responsibilities include developing test plans, coding UVM-based testbenches, building directed and random tests, and debugging failures to ensure high design quality. Preferred experience includes IP level ASIC verification, Verilog, System Verilog, UVM frameworks, and scripting for automation. Familiarity with computer architecture and protocols like PCIe, CXL, NVMe, or Ethernet is also beneficial.

What you'd actually do

  1. Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  2. Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  3. Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers
  4. Build the directed and random verification tests
  5. Run regressions, debug test failures towards ensuring high design functional, performance and quality

Skills

Required

  • Bachelors or Masters degree in computer engineering/Electrical Engineering

Nice to have

  • Proficient in IP level ASIC verification
  • Expert in Verilog, System Verilog, Object Oriented programming
  • Expert in developing UVM based verification frameworks and testbenches
  • Scripting and automation of verification processes and flows
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
  • Good Computer Architecture, systems knowledge
  • Comfortable in python / perl and editing / maintaining scripts
  • Exposure to leadership or mentorship is an asset
  • Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out
  • Experience with PCIe, CXL, NVMe or ethernet protocols
  • Strong communication skills and the ability to work independently as well as in a cross-site team environment

What the JD emphasized

  • IP level ASIC verification
  • Verilog, System Verilog, Object Oriented programming
  • UVM based verification frameworks and testbenches