Irem Physical Design Engineer

AMD AMD · Semiconductors · MARKHAM, Canada · Engineering

This role focuses on power integrity solutions for AMD's next-generation SoCs and advanced packaging technologies. Responsibilities include defining and optimizing power delivery networks, performing IR-drop and EM analysis, and shaping design methodologies for CPU/GPU products. The role involves partnering with physical design, packaging, and CAD teams, and influencing architecture-level decisions.

What you'd actually do

  1. Perform static/dynamic IR-drop and EM analysis and drive closure across large-scale SoCs.
  2. Define and optimize power grid architecture, including decap strategy and current distribution planning.
  3. Partner with physical design and packaging teams to align IR/EM signoff methodology with timing, floorplan, and system-level requirements.
  4. Develop and validate power integrity models; ensure correlation across PD, STA, and EMIR tools.
  5. Debug IR/EM issues, improve analysis methodology, and enable automation (Python/Tcl).

Skills

Required

  • IR-drop and EM analysis
  • Power grid architecture
  • Power delivery network design
  • Automation (Python/Tcl)

Nice to have

  • Experience with RedHawk or Voltus
  • Knowledge of advanced packaging/3DIC
  • Familiarity with PnR flows, timing closure, and UPF/CPF power intent
  • Strong understanding of signoff correlation