Lead AI Research Scientist, Hardware AI Systems

AMD AMD · Semiconductors · Santa Clara, CA · Engineering

Lead AI Research Scientist focused on developing AI systems that generalize across hardware engineering contexts, including metareasoning, representation learning, and learning under high- or mixed-latency rewards. The role involves creating reusable models and benchmarks by collaborating with methodology and silicon teams.

What you'd actually do

  1. Research transfer and multi-task learning for engineering agents across IP blocks, tools, and program generations
  2. Develop metareasoning policies for budgeting expensive EDA steps, selecting abstractions, and recovering from tool or data failures
  3. Build cross-program benchmarks and datasets that expose generalization gaps and track progress over time
  4. Collaborate with RL scientists on reward shaping and credit assignment when feedback is slow or heterogeneous
  5. Publish at top venues where appropriate; maintain internal technical standards for “generalization claims” backed by evidence

Skills

Required

  • PhD in Computer Science, Machine Learning, or related field
  • transfer learning
  • meta-learning
  • intelligent agents
  • long-horizon reinforcement learning (RL)
  • Large Language Models (LLM) tool use
  • planning
  • hierarchical control in real toolchains

Nice to have

  • Exposure to hardware development (RTL, verification, PD, or bring-up)
  • willingness to ramp with embedded experts

What the JD emphasized

  • generalize across hardware engineering contexts
  • without bespoke retraining for every program
  • metareasoning
  • representation learning across flows
  • learning under high- or mixed-latency rewards
  • turn one-off wins into reusable models, benchmarks, and transfer protocols
  • generalization gaps
  • slow or heterogeneous
  • generalization claims

Other signals

  • develop AI systems that generalize across hardware engineering contexts
  • metareasoning
  • representation learning across flows
  • learning under high- or mixed-latency rewards
  • turn one-off wins into reusable models, benchmarks, and transfer protocols