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Lead EDA SOFTWARE DEVELOPMENT ENGINEER
THE ROLE
AMD's Adaptive and Embedded Computing Group (AECG) is seeking a software engineer to develop and optimize FPGA implementation software (Vivado) for customers in the Emulation and Prototyping space. In this role, you will work on Vivado flows and features that address the unique scale, performance, and reliability demands of emulation platforms and FPGA prototype systems.
THE PERSON
The ideal candidate has strong software development skills and experience with EDA tools, particularly in FPGA implementation flows. They should be a capable individual contributor who can independently own features and bug fixes, engage with complex customer-driven problems, and collaborate across teams to deliver robust solutions. Familiarity with emulation or prototyping workflows is a strong advantage.
KEY RESPONSIBILITIES
- Design, develop, and optimize Vivado features and flows targeting emulation and prototyping use cases, including large design compilation, partitioning, floorplanning, and timing closure.
- Debug and resolve customer-reported issues in Vivado; benchmark tool performance and quality across releases.
- Analyze and improve Vivado runtime, memory footprint, and result quality to meet the scale demands of emulation and prototype customers.
- Work with architecture, hardware, and customer-facing teams to understand requirements and deliver well-integrated solutions; communicate status and interdependencies to management and senior staff.
- Initiate improvements to existing Vivado processes and algorithms; lead implementation within your assigned project scope.
- Coach and mentor junior engineers; serve as a technical resource for the immediate team.
- Explore opportunities to apply data-driven or ML-based techniques to EDA problems where applicable.
PREFERRED EXPERIENCE
- Proven proficiency in object-oriented programming (C/C++ preferred), with ability to produce high-quality, maintainable code.
- Solid background in EDA tools; hands-on experience with Vivado or comparable FPGA implementation tools strongly preferred.
- Familiarity with FPGA emulation platforms (e.g., Cadence Palladium, Synopsys ZeBu) or FPGA prototype flows is a significant plus.
- 8+ years of software development experience (BS), 6+ years (MS), or 3+ years (PhD), with focus on EDA or hardware design automation.
- Experience with large, complex designs — multi-million cell counts, multi-FPGA partitioning, or similar scale challenges.
- Familiarity with concurrent programming and threading APIs for multi-threaded performance optimization.
- Strong debugging, profiling, and performance evaluation skills.
- Exposure to ML/AI techniques in EDA workflows is a plus, but not required.
ACADEMIC CREDENTIALS
Bachelor's / Master's / PhD degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
WHY WORK AT AMD?
AMD's AECG organization is at the center of FPGA technology development, supporting customers who push FPGAs to their limits in pre-silicon verification and system prototyping. In this role, your work will directly affect the tools and flows these customers depend on, giving you deep technical challenges and visible impact. Join a collaborative team where strong engineering and customer focus drive real product outcomes.
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AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
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This posting is for an existing vacancy.