Lead Formal Verification Engineer

AMD AMD · Semiconductors · Austin, TX · Engineering

Lead Formal Verification Engineer at AMD to drive cutting-edge formal verification techniques for next-generation graphics IP design, including AI processors. Responsibilities include defining strategy, developing methodology and infrastructure, and leading research in emerging formal verification domains.

What you'd actually do

  1. Define long-term strategy for formal verification expansion and steer the technical roadmap
  2. Develop cutting-edge formal verification methodology to cover the whole graphics design, including both datapath and control logic. Scale formal verification to big and critical design for bug-free quality. Expand formal verification adoption to the whole IP development life cycle. Resolve challenging convergence issue through world class formal verification techniques like induction, reduction, abstraction, etc.
  3. Define and drive the best-in-class formal verification infrastructure to improve formal verification productivity. Enable more verification engineers to adopt this advanced verification technology without deep formal verification knowledge
  4. Lead the research group for emerging formal verification domains like security, safety, low power, architect level formal verification, etc. Explore the feasibility of formalizing ISA and memory model for GFXIP design
  5. Stay informed of latest trends and innovations in formal verification. Develop technical relationship with broader AMD Design community and peers. Drive cross-department innovation and collaboration inside AMD

Skills

Required

  • Formal verification techniques
  • Formal verification methodology
  • Formal verification infrastructure
  • System Verilog assertion
  • Abstract model development
  • Formal verification algorithms
  • Formal verification engines
  • Formal verification use cases
  • Computer architecture
  • Graphics pipeline

Nice to have

  • Leadership skills
  • Formal verification tool expertise (JasperGold, VC formal, Murphi, theorem prover)
  • FPV
  • DPV
  • SEV

What the JD emphasized

  • cutting-edge formal verification techniques
  • industry leading verification quality
  • tight schedule
  • formal verification roadmap
  • formal verification strategy
  • formal verification methodology
  • formal verification infrastructure
  • formal verification adoption
  • GFXIP formal verification practice
  • formal verification techniques
  • formal verification team
  • formal verification expansion
  • formal verification methodology
  • formal verification adoption
  • formal verification techniques
  • formal verification infrastructure
  • formal verification productivity
  • formal verification domains
  • formalizing ISA
  • formal verification
  • formal verification infrastructure
  • formal verification