Manager, Digital Design - Mixed-signal High-speed I/o Serdes

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Manager for a Digital Design team focused on Mixed-Signal High-Speed I/O SerDes, contributing to NVIDIA's technology for AI, gaming, and autonomous driving. The role involves leading design, verification, and tape-outs of mixed-signal chips and IPs for SoCs.

What you'd actually do

  1. Lead and mentor a team of engineers in developing mixed-signal chips
  2. Supervise the planning and specification of algorithms, evaluating PPA (Power, Performance, Area) trade-offs
  3. Guide the design of digital circuits such as filters and analog calibration circuits
  4. Ensure verification of digital designs using direct and random testing methodologies
  5. Lead front-end design flows (Lint/CDC/Synthesis/DFT/LEC/STA) and coordinate with back-end teams for successful chip tape-outs

Skills

Required

  • Mixed-signal chip design
  • Verilog or SystemVerilog
  • Logic design
  • RTL for mixed-signal blocks
  • Custom digital circuit design
  • Adaptation algorithms (FFE, DFE, CTLE, CDR, offset cancellation)
  • High-speed SerDes I/O digital design
  • Protocols like Ethernet and PCIe
  • Industry-standard verification methodologies (UVM)
  • Static timing and formal verification tools
  • Leadership skills

Nice to have

  • M.S. or Ph.D. in Electrical Engineering or equivalent experience
  • Analog calibration circuits
  • Direct and random testing methodologies

What the JD emphasized

  • over 8 years of overall experience in mixed signal
  • 3+ years in a leadership role
  • Expertise in Verilog or SystemVerilog
  • Strong background in custom digital circuit design and adaptation algorithms
  • Experience with industry-standard verification methodologies, such as UVM
  • Proficiency with static timing and formal verification tools