Manager Digital Engineering 2

Northrop Grumman Northrop Grumman · Aerospace · Baltimore, MD +1 · Engineering Mult-Func

Manager for Digital Engineering role focusing on people leadership and technical performance of FPGA/Firmware/digital design engineers. Responsibilities include staffing, workload forecast, employee development, adherence to design processes, and oversight of cost, schedule, and technical quality for development, integration, or production programs. Also responsible for advancing FPGA technology and driving new design processes.

What you'd actually do

  1. Responsible for staffing and workload forecast; employee inclusion, engagement, mentoring and career development; employee training and identification and training of skills required to execute on programs. The responsibilities include the recruiting, sourcing, onboarding, performance management and contract maintenance for the contractors working in the business area.
  2. Maintain positive relationships with internal and external stakeholders.
  3. Build diverse and inclusive teams with high levels of engagement, including mentoring and coaching.
  4. Leverage a portfolio with combined interpersonal, business and technical capabilities.
  5. Collaborate with Digital Management peers both in the FPGA Design 2 Section as well as the Digital Management across the Digital Technologies Department.

Skills

Required

  • Bachelor’s degree in Computer Engineering (BSCE), Electrical Engineering (BSEE) or related STEM Degree with 8 years of related experience or a Master’s degree with 6 years of related experience or a PhD with 4 years of related experience
  • U.S Citizenship is required
  • Must have 5 years experience in management or lead of employees and/or management of a project
  • Must have 8 years experience in all areas of the Digital/FPGA Design process, from requirements analysis through verification testing
  • Must have 5 years experience with designing, leading and managing FPGA design projects

Nice to have

  • Master’s degree in Computer Engineering (MSCE), Electrical Engineering (MSEE) or related STEM Degree
  • Active DoD Top Secret or higher clearance
  • Experience leading teams in a multi-disciplined engineering environment
  • Experience leading/managing FPGA, ASIC, SoC, and/or digital subsystem design projects
  • Knowledge of current digital technologies (FPGA, ASIC, SoC, verification, and/or subsystem)
  • Demonstrated proficiency in mentoring and the ability to build highly engaged teams
  • Excellent verbal and written communication skills and the ability to present knowledge to a wide variety of audiences of different backgrounds effectively

What the JD emphasized

  • Secret Clearance is required to start
  • Must have a Current/Active DoD Secret Clearance
  • Must be able to obtain Special Program Access (SAP)
  • An Active Secret Clearance and Special Program Access (SAP) are required for continued employment